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| 型號(hào)： | MCV18ET-I/SO |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO18 |
| 封裝： | 7.50 MM, LEAD FREE, SOIC-18 |
| 文件頁數(shù)： | 22/108頁 |
| 文件大?。?/td> | 1509K |
| 代理商： | MCV18ET-I/SO |
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MCV18E
DS41399A-page 20
2009 Microchip Technology Inc.
2.5
Indirect Addressing, INDF and
FSR Registers
The INDF register is not a physical register. Addressing
INDF actually addresses the register whose address is
contained in the FSR register (FSR is a pointer). This is
indirect addressing.
EXAMPLE 2-1:
INDIRECT ADDRESSING
Register file 05 contains the value 10h
Register file 06 contains the value 0Ah
Load the value 05 into the FSR register
A read of the INDF register will return the value of
10h
Increment the value of the FSR register by one
(FSR = 06)
A read of the INDR register now will return the
value of 0Ah.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although Status bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-2.
EXAMPLE 2-2:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit of the STATUS
register, as shown in Figure 2-4. However, IRP is not
used in the MCV18E.
FIGURE 2-4:
DIRECT/INDIRECT ADDRESSING
MOVLW
0x20
;initialize pointer
MOVWF
FSR
;to RAM
NEXT
CLRF
INDF
;clear RAM & FSR
INCF
FSR
;inc pointer
BTFSS
FSR,4
;all done?
GOTO
NEXT
;no, clear next
CONTINUE
:
;yes, continue
Note
1:
For register file map detail see Figure 2-2.
2:
Maintain clear for upward compatibility with future products.
3:
Not implemented.
Data
Memory(1)
Indirect Addressing
Direct Addressing
Bank Select Location Select
RP1: RP0
6
0
from opcode
IRP
FSR register
7
0
Bank Select
Location Select
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
FFh
80h
7Fh
00h
17Fh
100h
1FFh
180h
(3)
(2)
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|---|---|
| MC-V190H | 制造商:Panasonic Industrial Company 功能描述:FILTER KIT |
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