參數(shù)資料
型號： MCHC11F1CFNE5
廠商： Freescale Semiconductor
文件頁數(shù)： 96/158頁
文件大?。?/td> 0K
描述： MCU 8BIT 1KRAM 512EE 68-PLCC
標準包裝： 18
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 5MHz
連通性： SCI，SPI
外圍設備： POR，WDT
輸入/輸出數(shù)： 30
程序存儲器類型： ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-LCC（J 形引線）
包裝： 管件
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11F1
4-4
TECHNICAL DATA
During the software-based STOP mode, MCU clocks are stopped, but the MCU con-
tinues to draw power from VDD. Power supply current is directly proportional to oper-
ating frequency in CMOS integrated circuits and there is very little leakage when the
clocks are stopped. These two factors reduce power consumption while the MCU is in
STOP mode.
To reduce power consumption to a minimum, VDD can be turned off, and the MODB/
VSTBY pin can be used to supply RAM power from either a battery back-up or a sec-
ond power supply. Although this method requires external hardware, it is very effec-
tive. Refer to SECTION 2 PIN DESCRIPTIONS for information about how to connect
the standby RAM power supply. Refer to SECTION 5 RESETS AND INTERRUPTS
for a description of low power operation.
Figure 4-2 RAM Standby MODB/VSTBY Connections
4.2.2.2 Bootloader ROM
The bootloader ROM is enabled at address $BF00–$BFFF during special bootstrap
mode. The reset vector is fetched from this ROM and the MCU executes the bootload-
er firmware. In normal modes, the bootloader ROM is disabled.
4.2.2.3 EEPROM
The MC68HC11F1 contains 512 bytes of electrically erasable programmable read-
only memory (EEPROM). The default location for EEPROM is $FE00–$FFFF. Other
locations can be chosen according to the values written to EE[3:0] in the CONFIG reg-
ister. In single-chip and bootstrap modes, the EEPROM is forced on and located at the
default position. In these modes, the EEPROM cannot be remapped. In special test
mode, the EEPROM is disabled initially.
4.2.3 Registers
Table 4-1, a summary of registers and control bits, the registers are shown in ascend-
ing order within the 96-byte register block. The addresses shown are for default block
mapping ($1000–$105F), however, the register block can be remapped to any 4-Kbyte
page ($x000–$x05F) by the INIT register.
VBATT
VDD
TO MODB/VSTBY
OF M68HC11
VOUT
VDD
+
MAX
690
4.8 V
NiCd
4.7 k
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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