參數(shù)資料
型號(hào)： MCF52277CVM166
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 166.67 MHz, RISC PROCESSOR, PBGA196
封裝： 15 X 15 MM, PLASTIC, ROHS COMPLIANT, MAPBGA-196
文件頁數(shù)： 20/42頁
文件大?。?/td> 1632K
代理商： MCF52277CVM166
Electrical Characteristics
MCF5227x ColdFire Microprocessor Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
27
5.8
General Purpose I/O Timing
Figure 15. GPIO Timing
5.9
Reset and Configuration Override Timing
Table 15. GPIO Timing1
1 These general purpose specifications apply to the following signals: IRQn, all UART signals, FlexCAN signals, PWM
signals, DACKn and DREQn, and all signals configured as GPIO.
Num
Characteristic
Symbol
Min
Max
Unit
G1
FB_CLK High to GPIO Output Valid
tCHPOV
—10
ns
G2
FB_CLK High to GPIO Output Invalid
tCHPOI
1.5
—
ns
G3
GPIO Input Valid to FB_CLK High
tPVCH
9—
ns
G4
FB_CLK High to GPIO Input Invalid
tCHPI
1.5
—
ns
Table 16. Reset and Configuration Override Timing
Num
Characteristic
Symbol
Min
Max
Unit
R1
RESET Input valid to FB_CLK High
tRVCH
9—
ns
R2
FB_CLK High to RESET Input invalid
tCHRI
1.5
—
ns
R3
RESET Input valid Time 1
1 During low power STOP, the synchronizers for the RESET input are bypassed and RESET is asserted asynchronously to
the system. Thus, RESET must be held a minimum of 100 ns.
tRIVT
5—
tCYC
R4
FB_CLK High to RSTOUT Valid
tCHROV
—10
ns
R5
RSTOUT valid to Config. Overrides valid
tROVCV
0—
ns
R6
Configuration Override Setup Time to RSTOUT invalid
tCOS
20
—
tCYC
R7
Configuration Override Hold Time after RSTOUT invalid
tCOH
0—
ns
R8
RSTOUT invalid to Configuration Override High Impedance
tROICZ
—1
tCYC
G1
FB_CLK
GPIO Outputs
G2
G3
G4
GPIO Inputs
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