參數(shù)資料
型號： MC9328MXSVP10R2
廠商： Freescale Semiconductor
文件頁數(shù)： 13/74頁
文件大?。?/td> 0K
描述： IC MCU I.MXS 100MHZ 225-MAPBGA
標(biāo)準(zhǔn)包裝： 1,000
系列： i.MXS
核心處理器： ARM9
芯體尺寸： 32-位
速度： 100MHz
連通性： EBI/EMI，I²C，SPI，SSI，UART/USART，USB
外圍設(shè)備： DMA，I²S，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 97
程序存儲器類型： ROMless
電壓 - 電源 (Vcc/Vdd)： 1.7 V ~ 3.3 V
振蕩器型： 外部
工作溫度： 0°C ~ 70°C
封裝/外殼： 225-LFBGA
包裝： 帶卷 (TR)
Functional Description and Application Information
MC9328MXS Technical Data, Rev. 3
20
Freescale Semiconductor
4.2
DPLL Timing Specifications
Parameters of the DPLL are given in Table 10. In this table, Tref is a reference clock period after the
pre-divider and Tdck is the output double clock period.
4.3
Reset Module
The timing relationships of the Reset module with the POR and RESET_IN are shown in Figure 3 and
NOTE
Be aware that NVDD must ramp up to at least 1.8V before QVDD is powered up
to prevent forward biasing.
Table 10. DPLL Specifications
Parameter
Test Conditions
Minimum
Typical
Maximum
Unit
DPLL input clock freq range
Vcc = 1.8V
5
–
100
MHz
Pre-divider output clock
freq range
Vcc = 1.8V
5–
30
MHz
DPLL output clock freq range
Vcc = 1.8V
80
–
220
MHz
Pre-divider factor (PD)
–
1
–
16
–
Total multiplication factor (MF)
Includes both integer and fractional parts
5
–
15
–
MF integer part
–
5
–
15
–
MF numerator
Should be less than the denominator
0
–
1022
–
MF denominator
–
1
–
1023
–
Pre-multiplier lock-in time
–
312.5
μsec
Freq lock-in time after
full reset
FOL mode for non-integer MF
(does not include pre-multi lock-in time)
250
280
(56
μs)
300
Tref
Freq lock-in time after
partial reset
FOL mode for non-integer MF (does not
include pre-multi lock-in time)
220
250
(50
μs)
270
Tref
Phase lock-in time after
full reset
FPL mode and integer MF (does not include
pre-multi lock-in time)
300
350
(70
μs)
400
Tref
Phase lock-in time after
partial reset
FPL mode and integer MF (does not include
pre-multi lock-in time)
270
320
(64
μs)
370
Tref
Freq jitter (p-p)
–
0.005
(0.01%)
0.01
2Tdck
Phase jitter (p-p)
Integer MF, FPL mode, Vcc=1.8V
–
1.0
(10%)
1.5
ns
Power supply voltage
–
1.7
–
2.5
V
Power dissipation
FOL mode, integer MF,
fdck = 100 MHz, Vcc = 1.8V
––
4
mW
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