參數(shù)資料
型號: MC9328MXSVP10
廠商: Freescale Semiconductor
文件頁數(shù): 73/74頁
文件大小: 0K
描述: IC MCU I.MXS 100MHZ 225-MAPBGA
標(biāo)準(zhǔn)包裝: 160
系列: i.MXS
核心處理器: ARM9
芯體尺寸: 32-位
速度: 100MHz
連通性: EBI/EMI,I²C,SPI,SSI,UART/USART,USB
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 97
程序存儲器類型: ROMless
電壓 - 電源 (Vcc/Vdd): 1.7 V ~ 3.3 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 225-LFBGA
包裝: 托盤
Signals and Connections
MC9328MXS Technical Data, Rev. 3
8
Freescale Semiconductor
2.1
I/O Pads Power Supply and Signal Multiplexing Scheme
This section describes detailed information about both the power supply for each I/O pin and its function
multiplexing scheme. The user can reference information provided in Table 6 on page 17 to configure the
power supply scheme for each device in the system (memory and external peripherals). The function
multiplexing information also shown in Table 6 allows the user to select the function of each pin by
configuring the appropriate GPIO registers when those pins are multiplexed to provide different functions.
PB[13:8]
Dedicated GPIO
Digital Supply Pins
NVDD
Digital Supply for the I/O pins
NVSS
Digital Ground for the I/O pins
Supply Pins – Analog Modules
AVDD
Supply for analog blocks
Internal Power Supply
QVDD
Power supply pins for silicon internal circuitry
QVSS
Ground pins for silicon internal circuitry
Table 3. MC9328MXS Signal Multiplexing Scheme
I/O Supply
Voltage
225
BGA
Ball
Primary
Alternate
GPIO
AIN
BIN
AOUT
Default
Signal
Dir
Pull-
Up
Signal
Dir
Mux
Pull
-Up
NVDD1
D2
A24
O
ETMTRAC
ESYNC
O
PA0
69K
Reser
ved
A24
NVDD1
C1
D31
I/O
69K
NVDD1
D1
A23
O
ETMTRAC
ECLK
O
PA31
69K
A23
NVDD1
E3
D30
I/O
69K
NVDD1
E2
A22
O
ETMPIPE
STAT2
O
PA30
69K
A22
NVDD1
E4
D29
I/O
69K
NVDD1
E1
A21
O
ETMPIPE
STAT1
O
PA29
69K
A21
NVDD1
F3
D28
I/O
69K
NVDD1
F1
A20
O
ETMPIPE
STAT0
O
PA28
69K
A20
NVDD1
F4
D27
I/O
69K
NVDD1
F2
A19
O
ETMTRAC
EPKT3
O
PA27
69K
A19
NVDD1
G3
D26
I/O
69K
Table 2. i.MXS Signal Descriptions (Continued)
Signal Name
Function/Notes
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