參數(shù)資料
型號(hào)： MC9328MXLVF15
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 150 MHz, RISC PROCESSOR, PBGA225
封裝： 13 X 13 MM, 0.80 MM PITCH, MAPBGA-225
文件頁(yè)數(shù)： 44/89頁(yè)
文件大小： 1869K
代理商： MC9328MXLVF15
Specifications
MOTOROLA
MC9328MXL Advance Information
49
3.11 Multimedia Card/Secure Digital Host Controller
The DMA interface block controls all data routing between the external data bus (DMA access), internal
MMC/SD module data bus, and internal system FIFO access through a dedicated state machine that
monitors the status of FIFO content (empty or full), FIFO address, and byte/block counters for the
MMC/SD module (inner system) and the application (user programming).
Figure 38. Chip-Select Read Cycle Timing Diagram
Table 17. SDHC Bus Timing Parameter Table
Ref
No.
Parameter
1.8V ± 0.10V
3.0 ± 0.30V
Unit
Minimum
Maximum
Minimum
Maximum
1
CLK frequency at Data transfer
Mode (PP)1—10/30 cards
1.
CL
≤ 100 pF / 250 pF (10/30 cards)
0
25/5
0
25/5
MHz
2
CLK frequency at Identification
Mode2
2.
CL
≤ 250 pF (21 cards)
0
400
0
400
kHz
3a
Clock high time1—10/30 cards
6/33
—
10/50
—
ns
3b
Clock low time1—10/30 cards
15/75
—
10/50
—
ns
4a
Clock fall time1—10/30 cards
—
10/50
(5.00)3
—10/50
ns
4b
Clock rise time1—10/30 cards
—
14/67
(6.67)3
—10/50
ns
5a
Input hold time3—10/30 cards
3.
CL
≤ 25 pF (1 card)
5.7/5.7
—
5/5
—
ns
5b
Input setup time3—10/30 cards
5.7/5.7
—
5/5
—
ns
6a
Output hold time3—10/30 cards
5.7/5.7
—
5/5
—
ns
6b
Output setup time3—10/30 cards
5.7/5.7
—
5/5
—
ns
7
Output delay time3
016
014
ns
Bus Clock
5b
6b
6a
7
5a
4a
3a
1
CMD_DAT Input
CMD_DAT Output
4b
3b
Valid Data
2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MXLVF20 制造商:Rochester Electronics LLC 功能描述:DRAGONBALL CORSICA 225 - Bulk 制造商:Motorola Inc 功能描述:
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MC9328MXLVH15 制造商:FREESCALE-SEMI 功能描述:
MC9328MXLVH20 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor
MC9328MXLVH20R2 制造商:Rochester Electronics LLC 功能描述:DRAGONBALL CORSICA - Bulk 制造商:Motorola Inc 功能描述:
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