參數(shù)資料
型號: MC9328MXLVF15
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 150 MHz, RISC PROCESSOR, PBGA225
封裝: 13 X 13 MM, 0.80 MM PITCH, MAPBGA-225
文件頁數(shù): 41/89頁
文件大?。?/td> 1869K
代理商: MC9328MXLVF15
46
MC9328MXL Advance Information
MOTOROLA
Specifications
Figure 35. Slave SPI Timing Diagram FIFO Advanced by SS Rising Edge
3.10 LCD Controller
This section includes timing diagrams for the LCD controller. For detailed timing diagrams of the LCD
controller with various display configurations, refer to the LCD controller chapter of the MC9328MXL
Reference Manual.
Figure 36. SCLK to LD Timing Diagram
Table 14. Timing Parameter Table for Figure 31 through Figure 35
Ref
No.
Parameter
1.8V ± 0.10V
3.0V ± 0.30V
Unit
Minimum
Maximum
Minimum
Maximum
1
SPI_RDY to SS output low
2T 1
1.
T = CSPI system clock period (PERCLK2).
2T1
—ns
2
SS output low to first SCLK
edge
3 Tsclk 2
2.
Tsclk = Period of SCLK.
3 Tsclk2
—ns
3
Last SCLK edge to SS output
high
2 Tsclk
2 Tsclk
ns
4
SS output high to SPI_RDY
low
0—
0
ns
5SS output pulse width
Tsclk +
WAIT 3
3.
WAIT = Number of bit clocks (SCLK) or 32.768 kHz clocks per Sample Period Control Register.
Tsclk +
WAIT3
—ns
6
SS input low to first SCLK
edge
T—
T
ns
7SS input pulse width
T
T
ns
6
7
SS (input)
SCLK, MOSI, MISO
1
LSCLK
LD[15:0]
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