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參數(shù)資料
| 型號： | MC9328MXLDVP20R2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 87/90頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU I.MX 200MHZ 225-MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | i.MXL |
| 核心處理器： | ARM9 |
| 芯體尺寸： | 32-位 |
| 速度： | 200MHz |
| 連通性： | EBI/EMI，I²C，MMC/SD，SPI，SSI，UART/USART，USB |
| 外圍設(shè)備： | DMA，I²S，LCD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 97 |
| 程序存儲器類型： | ROMless |
| 電壓 - 電源 (Vcc/Vdd)： | 1.7 V ~ 3.3 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -30°C ~ 70°C |
| 封裝/外殼： | 225-LFBGA |
| 包裝： | 帶卷 (TR) |
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Product Documentation
MC9328MXL Technical Data, Rev. 8
88
Freescale Semiconductor
6
Product Documentation
6.1
Revision History
Table 39 provides revision history for this release. This history includes technical content revisions only
and not stylistic or grammatical changes.
6.2
Reference Documents
The following documents are required for a complete description of the MC9328MXL and are necessary
to design properly with the device. Especially for those not familiar with the ARM920T processor or
previous i.MX processor products, the following documents are helpful when used in conjunction with this
document.
ARM Architecture Reference Manual (ARM Ltd., order number ARM DDI 0100)
ARM9DT1 Data Sheet Manual (ARM Ltd., order number ARM DDI 0029)
ARM Technical Reference Manual (ARM Ltd., order number ARM DDI 0151C)
EMT9 Technical Reference Manual (ARM Ltd., order number DDI O157E)
MC9328MXL Product Brief (order number MC9328MXLP)
MC9328MXL Reference Manual (order number MC9328MXLRM)
The Freescale manuals are available on the Freescale Semiconductors Web site at
http://www.freescale.com/imx. These documents may be downloaded directly from the Freescale Web
site, or printed versions may be ordered. The ARM Ltd. documentation is available from
http://www.arm.com.
Table 39. i.MXL Data Sheet Revision History Rev. 8
Location
Revision
Signal Names and
Descriptions
Added the DMA_REQ signal to table.
Corrected signal name from USBD_OE to USBD_ROE
Signal Multiplex Table i.MXL
Added Signal Multiplex table from Reference Manual with the following changes:
Changed I/O Supply Voltage,PB31–20, from NVDD3 to NVDD4
Added 225 BGA column.
Removed 69K pull-up resistor from EB1, EB2, and added to D9
Changed first and second parameters descriptions:
From: Reference Clock freq range, To: DPLL input clock freq range
From: Double clock freq range, To: DPLL output freq range
Added Signal Multiplex table.
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