
Signals and Connections
MC9328MXL Technical Data, Rev. 8
Freescale Semiconductor
7
CLS
Start signal output for gate driver. This signal is an inverted version of PS (Sharp panel dedicated
signal).
REV
Signal for common electrode driving signal preparation (Sharp panel dedicated signal).
SPI 1 and SPI 2
SPI1_MOSI
Master Out/Slave In
SPI1_MISO
Slave In/Master Out
SPI1_SS
Slave Select (Selectable polarity)
SPI1_SCLK
Serial Clock
SPI1_SPI_RDY
Serial Data Ready
SPI2_TXD
SPI2 Master TxData Output—This signal is multiplexed with a GPI/O pin yet shows up as a primary or
alternative signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in
the MC9328MXL Reference Manual for information about how to bring this signal to the assigned pin.
SPI2_RXD
SPI2 Master RxData Input—This signal is multiplexed with a GPI/O pin yet shows up as a primary or
alternative signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in
the MC9328MXL Reference Manual for information about how to bring this signal to the assigned pin.
SPI2_SS
SPI2 Slave Select—This signal is multiplexed with a GPI/O pin yet shows up as a primary or alternative
signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in the
MC9328MXL Reference Manual for information about how to bring this signal to the assigned pin.
SPI2_SCLK
SPI2 Serial Clock—This signal is multiplexed with a GPI/O pin yet shows up as a primary or alternative
signal in the signal multiplex scheme table. Please refer to the SPI and GPIO chapters in the
MC9328MXL Reference Manual for information about how to bring this signal to the assigned pin.
General Purpose Timers
TIN
Timer Input Capture or Timer Input Clock—The signal on this input is applied to both timers
simultaneously.
TMR2OUT
Timer 2 Output
USB Device
USBD_VMO
USB Minus Output
USBD_VPO
USB Plus Output
USBD_VM
USB Minus Input
USBD_VP
USB Plus Input
USBD_SUSPND
USB Suspend Output
USBD_RCV
USB Receive Data
USBD_ROE
USB OE
USBD_AFE
USB Analog Front End Enable
Secure Digital Interface
SD_CMD
SD Command—If the system designer does not wish to make use of the internal pull-up, via the Pull-up
enable register, a 4.7K–69K external pull up resistor must be added.
SD_CLK
MMC Output Clock
Table 2. i.MXL Signal Descriptions (Continued)
Signal Name
Function/Notes
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MXL
Product
Family