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| 型號(hào)： | MC9328MXLDVP20R2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA225 |
| 封裝： | 13 X 13 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-225 |
| 文件頁數(shù)： | 66/90頁 |
| 文件大?。?/td> | 1242K |
| 代理商： | MC9328MXLDVP20R2 |
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Functional Description and Application Information
MC9328MXL Technical Data, Rev. 8
Freescale Semiconductor
69
Table 27. SDRAM Read Timing Parameter Table
Ref
No.
Parameter
1.8 ± 0.1 V
3.0 ± 0.3 V
Unit
Minimum
Maximum
Minimum
Maximum
1
SDRAM clock high-level width
2.67
–
4
–
ns
2
SDRAM clock low-level width
6
–4–
ns
3
SDRAM clock cycle time
11.4
–
10
–
ns
3S
CS, RAS, CAS, WE, DQM setup time
3.42
–
3
–
ns
3H
CS, RAS, CAS, WE, DQM hold time
2.28
–
2
–
ns
4S
Address setup time
3.42
–
3
–
ns
4H
Address hold time
2.28
–
2
–
ns
5
SDRAM access time (CL = 3)
–
6.84
–
6
ns
5
SDRAM access time (CL = 2)
–
6.84
–
6
ns
5
SDRAM access time (CL = 1)
–
22
–
22
ns
6
Data out hold time
2.85
–
2.5
–
ns
7
Data out high-impedance time (CL = 3)
–
6.84
–
6
ns
7
Data out high-impedance time (CL = 2)
–
6.84
–
6
ns
7
Data out high-impedance time (CL = 1)
–
22
–
22
ns
8
Active to read/write command period (RC = 1)
tRCD
1
1 t
RCD = SDRAM clock cycle time. This settings can be found in the MC9328MXL reference manual.
–tRCD1
–ns
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MXL
Product
Family
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