參數(shù)資料
型號(hào)： MC9328MX1VM20R2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 200 MHz, RISC PROCESSOR, PBGA256
封裝： 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件頁(yè)數(shù)： 85/94頁(yè)
文件大小： 1487K
代理商： MC9328MX1VM20R2
86
MC9328MX1 Advance Information
MOTOROLA
Specifications
3.21 CMOS Sensor Interface
The CSI module consists of a control register to configure the interface timing, a control register for
statistic data generation, a status register, interface logic, a 32
× 32 image data receive FIFO, and a 16 × 32
statistic data FIFO.
3.21.1 Gated Clock Mode
Figure 68 shows the timing diagram when the CMOS sensor output data is configured for negative edge
and the CSI is programmed to received data on the positive edge. Figure 69 on page 87 shows the timing
diagram when the CMOS sensor output data is configured for positive edge and the CSI is programmed to
received data in negative edge. The parameters for the timing diagrams are listed in Table 42 on page 87.
Figure 68. Sensor Output Data on Pixel Clock Falling Edge
CSI Latches Data on Pixel Clock Rising Edge
1
3
6
5
VSYNC
HSYNC
PIXCLK
DATA[7:0]
Valid Data
4
7
2
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參數(shù)描述
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