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參數(shù)資料
| 型號： | MC8641DVU1250JC |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROPROCESSOR, CBGA1023 |
| 封裝： | 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023 |
| 文件頁數(shù)： | 28/140頁 |
| 文件大?。?/td> | 1484K |
| 代理商： | MC8641DVU1250JC |
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
123
System Design Information
Figure 63 and Figure 64 show the PLL power supply filter circuits for the platform and cores, respectively.
Figure 63. MPC8641 PLL Power Supply Filter Circuit (for platform and Local Bus)
Figure 64. MPC8641 PLL Power Supply Filter Circuit (for cores)
The AVDD_SRDSn signals provide power for the analog portions of the SerDes PLL. To ensure stability
of the internal clock, the power supplied to the PLL is filtered using a circuit similar to the one shown in
following figure. For maximum effectiveness, the filter circuit is placed as closely as possible to the
AVDD_SRDSn balls to ensure it filters out as much noise as possible. The ground connection should be
near the AVDD_SRDSn balls. The 0.003-F capacitor is closest to the balls, followed by the two 2.2-F
capacitors, and finally the 1
Ω resistor to the board supply plane. The capacitors are connected from
AVDD_SRDSn to the ground plane. Use ceramic chip capacitors with the highest possible self-resonant
frequency. All traces should be kept short, wide and direct.
Figure 65. SerDes PLL Power Supply Filter
Note the following:
AVDD_SRDSn should be a filtered version of SVDD.
Signals on the SerDes interface are fed from the SVDD power plan.
2.2 F
GND
Low ESL Surface Mount Capacitors
10
Ω
AVDD_PLAT, AVDD_LB;
VDD_PLAT
VDD_Core0/1
AVDD_Core0/1
2.2 F
GND
Low ESL Surface Mount Capacitors
10
Ω
Filter Circuit (should not be used for Single core device)
Note: For single core device the filter circuit (in the dashed box) should
be removed and AVDD_Core1 should be tied to ground with a weak
(2-10 k
Ω) pull-down resistor.
2.2 F 1
0.003 F
GND
1.0
Ω
AVDD_SRDSn
1. An 0805 sized capacitor is recommended for system initial bring-up.
SVDD
2.2 F 1
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