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| 型號(hào)： | MC68LC302PU20VCT |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-100 |
| 文件頁(yè)數(shù)： | 111/128頁(yè) |
| 文件大?。?/td> | 641K |
| 代理商： | MC68LC302PU20VCT |
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Applications
6-4
MC68EN302 REFERENCE MANUAL
MOTOROLA
operations.The MC68EN302 buffer descriptors are a superset of the QUICC buffer
descriptors. The transmit buffer descriptors are identical, while the MC68EN302 receive
buffer descriptors include an additional bit in the most significant word which is used as an
indication for address matching while running in promiscuous mode. Any driver that
implements Ethernet on the QUICC will be able to utilize the same buffer descriptor structure
and handling when running on the MC68EN302. Following the Ethernet register map from
the MC68360UM/AD Revision 2.0 user's manual in the table listing the Ethernet Specific
Parameters (in the Parameter RAM), the corresponding function in the MC68EN302 is listed
below. Items in italics indicate that that particular parameter was not part of the QUICC
initialization process and is not required for CRC.
The standard 32 bit CRC calculation for the CRC is performed in the MC68EN302 hardware,
and therefore there is no need to write to the CRC value.
6.2.1 C_PRES, C_MASK:
The QUICC preset and mask options for the CRC calculation are not required in the
MC68EN302 because the CRC is automatically calculated in hardware.
6.2.2 CRCEC:
In the MC68EN302, CRC errors are flagged in the buffer descriptor indication rather than
keeping a running counter as in the QUICC. A software counter may be implemented to
support this function with very little difficulty by incrementing the count each time the CR bit
(bit 2 in the most significant long word of the buffer descriptor) is set.
6.2.3 ALEC:
The Alignment error is flagged in the buffer descriptor indication and therefore a software
counter may be implemented to support this function. A counter may be incremented each
time the NO bit (bit 4 in the most significant long word of the buffer descriptor) is set.
6.2.4 DISFC:
This function is not required in standard Ethernet. If frames are discarded because of error
conditions, then the buffer descriptor is flagged with the error notification. If a buffer
descriptor is not available, then an overrun error occurs, notifying the user that a frame was
discarded because no buffer descriptors were available. If a frame is discarded because of
the address filtering that is implemented on the MC68EN302, there is no indication provided
since this function is generally used for collecting network statistics and does not add to the
station performance.
6.2.5 PADS:
In the transmit direction the padding is automatic and is always generated as all ones.
6.2.6 RET_LIM:
Set in hardware to standard Ethernet values of 15.
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| MC68LC302PU25CT | 功能描述:微處理器 - MPU 25MHz 2.5MIPS RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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