- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67968 > MC68HLC705KJ1CP (MOTOROLA INC) 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP16 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HLC705KJ1CP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 67/117頁 |
| 文件大?。?/td> | 1644K |
| 代理商： | MC68HLC705KJ1CP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁當(dāng)前第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁
MC68HC705KJ1MC68HRC705KJ1MC68HLC705KJ1 — Rev. 4.0
Data Sheet
MOTOROLA
External Interrupt Module (IRQ)
53
Data Sheet — MC68HC705KJ1
Section 5. External Interrupt Module (IRQ)
5.1 Introduction
The external interrupt (IRQ) module provides asynchronous external interrupts to
the CPU. The following sources can generate external interrupts:
IRQ/VPP pin
PA0–PA3 pins
5.2 Features
The external interrupt module (IRQ) includes these features:
Dedicated external interrupt pin (IRQ/VPP)
Selectable interrupt on four input/output (I/O) pins (PA0–PA3)
Programmable edge-only or edge- and level-interrupt sensitivity
5.3 Operation
The interrupt request/programming voltage pin (IRQ/VPP) and port A pins 0–3
(PA0–PA3) provide external interrupts. The PIRQ bit in the mask option register
(MOR) enables PA0–PA3 as IRQ interrupt sources, which are combined into a
single OR’ing function to be latched by the IRQ latch. Figure 5-1 shows the
structure of the IRQ module.
After completing its current instruction, the CPU tests the IRQ latch. If the IRQ latch
is set, the CPU then tests the I bit in the condition code register and the IRQE bit
in the IRQ status and control register. If the I bit is clear and the IRQE bit is set, the
CPU then begins the interrupt sequence. This interrupt is serviced by the interrupt
service routine located at $07FA and $07FB.
The CPU clears the IRQ latch while it fetches the interrupt vector, so that another
external interrupt request can be latched during the interrupt service routine. As
soon as the I bit is cleared during the return from interrupt, the CPU can recognize
the new interrupt request. Figure 5-3 shows the sequence of events caused by an
interrupt.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC7455ARX867LG | 32-BIT, 867 MHz, RISC PROCESSOR, CBGA483 |
| MC7445ARX733LG | 32-BIT, 733 MHz, RISC PROCESSOR, CBGA360 |
| MC7445ARX1000LG | 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA360 |
| MC7445ARX933LG | 32-BIT, 933 MHz, RISC PROCESSOR, CBGA360 |
| MC7455ARX1000LG | 32-BIT, 1000 MHz, RISC PROCESSOR, CBGA483 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HLC908JK3CP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QT1CFQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QT4CDW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QT4CFQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HLC908QY1CDW | 制造商:Rochester Electronics LLC 功能描述:LOW V-1.5K FLASH W/O ADC - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。