參數(shù)資料
型號(hào): MC68HCL05C9AFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 4/162頁
文件大?。?/td> 1093K
代理商: MC68HCL05C9AFN
Serial Peripheral Interface (SPI)
SPI Registers
MC68HC05C9A Rev. 5.0
Advance Information
MOTOROLA
Serial Peripheral Interface (SPI)
101
N
O
N-D
I
SC
L
O
SU
R
E
AG
R
EEMENT
R
E
Q
U
IR
ED
10.6.3 Serial Peripheral Data I/O Register
The serial peripheral data I/O register (SPDR), shown in Figure 10-6, is
used to transmit and receive data on the serial bus. Only a write to this
register will initiate transmission/reception of another byte and this will
only occur in the master device. At the completion of transmitting a byte
of data, the SPIF status bit is set in both the master and slave devices.
When the user reads the serial peripheral data I/O register, a buffer is
actually being read. The first SPIF must be cleared by the time a second
transfer of the data from the shift register to the read buffer is initiated or
an overrun condition will exist. In cases of overrun, the byte which
causes the overrun is lost.
A write to the serial peripheral data I/O register is not buffered and places
data directly into the shift register for transmission.
Address:
$000C
Bit 7
6
54321
Bit 0
Read:
SPD7
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
SPD0
Write:
Reset:
Unaffected by reset
Figure 10-6. SPI Data Register (SPDR)
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