參數(shù)資料
型號: MC68HCL05C9AFN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 115/162頁
文件大?。?/td> 1093K
代理商: MC68HCL05C9AFN
N
O
N-D
I
SC
L
O
SU
R
E
AG
R
EEMENT
R
E
Q
U
IR
ED
Low-Power Modes
Advance Information
MC68HC05C9A Rev. 5.0
56
Low-Power Modes
MOTOROLA
Figure 6-1. Stop Recovery Timing Diagram
6.4 Wait Mode
The WAIT instruction places the MCU in a low-power consumption
mode, but wait mode consumes more power than stop mode. All central
processor unit (CPU) action is suspended, but the timer, serial
communications interface (SCI), serial peripheral interface (SPI), and
the oscillator remain active. Any interrupt or reset will cause the MCU to
exit wait mode.
During wait mode, the I bit in the CCR is cleared to enable interrupts. All
other registers, memory, and I/O lines remain in their previous state. The
timer, SCI, and SPI may be enabled to allow a periodic exit from the wait
mode.
$3FFE
$3FFF
INTERNAL
ADDRESS
BUS
INTERNAL
CLOCK
IRQ
(3)
IRQ
(2)
RESET
OSC1
(1)
t
ILCH
4064 t
CYC
RESET OR INTERRUPT
VECTOR FETCH
t
LIH
t
RL
Notes:
1. Represents the internal gating of the OSC1 pin
2. IRQ pin edge-sensitive mask option
3. IRQ pin level and edge-sensitive mask option
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