參數(shù)資料
型號： MC68HCL05C9AFN
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 137/162頁
文件大?。?/td> 1093K
代理商： MC68HCL05C9AFN
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Serial Communications Interface (SCI)
Advance Information
MC68HC05C9A — Rev. 5.0
76
Serial Communications Interface (SCI)
MOTOROLA
9.4 SCI Receiver Features
Features of the SCI receiver include:
Receiver wakeup function (idle line or address bit)
Idle line detection
Framing error detection
Noise detection
Overrun detection
Receiver data register full flag
9.5 SCI Transmitter Features
Features of the SCI transmitter include:
Transmit data register empty flag
Transmit complete flag
Send break
9.6 Functional Description
A block diagram of the SCI is shown in Figure 9-1. Option bits in serial
control register1 (SCCR1) select the wakeup method (WAKE bit) and
data word length (M bit) of the SCI. SCCR2 provides control bits that
individually enable the transmitter and receiver, enable system
interrupts, and provide the wakeup enable bit (RWU) and the send break
code bit (SBK). Control bits in the baud rate register (BAUD) allow the
user to select one of 32 different baud rates for the transmitter and
receiver.
Data transmission is initiated by writing to the serial communications
data register (SCDR). Provided the transmitter is enabled, data stored in
the SCDR is transferred to the transmit data shift register. This transfer
of data sets the transmit data register empty flag (TDRE) in the SCI
status register (SCSR) and generates an interrupt (if transmitter
interrupts are enabled). The transfer of data to the transmit data shift
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