MC68HC16R1/916R1
USER’S MANUAL
MOTOROLA
xiii
(Continued)
Title
Paragraph
Page
TABLE OF CONTENTS
D.2.17
D.2.18
D.2.19
D.2.20
D.2.21
D.2.22
D.2.23
D.2.24
D.2.25
D.2.26
D.2.27
D.2.28
D.2.29
D.2.30
D.2.31
D.2.32
D.3
D.3.1
D.3.2
D.3.3
D.4
D.4.1
D.4.2
D.4.3
D.4.4
D.5
D.5.1
D.5.2
D.5.3
D.5.4
D.5.5
D.5.6
D.5.7
D.6
D.6.1
D.6.2
D.6.3
D.6.4
D.6.5
D.6.6
D.6.7
Periodic Interrupt Timer Register ................................................... D-15
Software Watchdog Service Register ............................................. D-16
Port F Edge-Detect Flag Register .................................................. D-17
Port F Edge-Detect Interrupt Vector ............................................... D-17
Port F Edge-Detect Interrupt Level ................................................. D-17
Port C Data Register ...................................................................... D-18
Chip-Select Pin Assignment Registers ........................................... D-18
Chip-Select Base Address Register Boot ....................................... D-20
Chip-Select Base Address Registers ............................................. D-20
Chip-Select Option Register Boot .................................................. D-21
Chip-Select Option Registers ......................................................... D-21
Master Shift Registers .................................................................... D-24
Test Module Shift Count Register .................................................. D-24
Test Module Repetition Count Register ......................................... D-24
Test Module Control Register ......................................................... D-25
Test Module Distributed Register ................................................... D-25
Standby RAM Module ............................................................................ D-26
RAM Module Configuration Register .............................................. D-26
RAM Test Register ......................................................................... D-27
Array Base Address Registers ....................................................... D-27
Masked ROM Module ............................................................................. D-28
Masked ROM Module Configuration Register ................................ D-28
ROM Array Base Address Registers .............................................. D-30
ROM Signature Registers .............................................................. D-30
ROM Bootstrap Words ................................................................... D-31
Analog-to-Digital Converter Module ....................................................... D-32
ADC Module Configuration Register .............................................. D-33
ADC Test Register ......................................................................... D-33
Port ADA Data Register ................................................................. D-33
Control Register 0 .......................................................................... D-34
Control Register 1 .......................................................................... D-35
Status Register ............................................................................... D-39
Right Justified, Unsigned Result Register ...................................... D-39
Multichannel Communication Interface Module ..................................... D-41
MCCI Module Configuration Register ............................................. D-41
MCCI Test Register ........................................................................ D-42
SCI Interrupt Level Register ........................................................... D-42
MCCI Interrupt Vector Register ...................................................... D-43
SPI Interrupt Level Register ........................................................... D-43
MCCI Pin Assignment Register ...................................................... D-44
MCCI Data Direction Register ........................................................ D-45