- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄201871 > MC68HC912BL16VFU8 (FREESCALE SEMICONDUCTOR INC) 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC912BL16VFU8 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | QFP-64 |
| 文件頁數(shù)： | 28/128頁 |
| 文件大?。?/td> | 3326K |
| 代理商： | MC68HC912BL16VFU8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁
MC68HC912BL16TS/D
123
Single full-feature breakpoint which will cause the part to enter background debug mode (BDM)
Dual address-only breakpoints, each of which will cause the part to enter BDM
Breakpoints will not occur when BDM is active.
15.3.1.1 SWI Dual Address Mode
In this mode, dual address-only breakpoints can be set, each of which cause a software interrupt. This
is the only breakpoint mode which can force the CPU to execute a SWI. Program fetch tagging is the
default in this mode; data breakpoints are not possible. In the dual mode each address breakpoint is
affected by the respective BKALE bit. The BKxRW, BKxRWE, BKMBH and BKMBL bits are ignored. In
dual address mode the BKDBE becomes an enable for the second address breakpoint.
15.3.1.2 BDM Full Breakpoint Mode
This is a single full-featured breakpoint which causes the part to enter background debug mode.
BK1ALE, BK1RW, and BK1RWE have no meaning in full breakpoint mode.
BKDBE enables data compare but has no meaning if BKPM=1. BKMBH and BKMBL allow masking of
high and low byte compares but has no meaning if BKPM=1. BK0ALE enables compare of low address
byte.
Breakpoints are not allowed if the BDM mode is already active. Active mode means the CPU is
executing out of the BDM ROM.
BDM should not be entered from a breakpoint unless the ENABLE bit is set in the BDM. This is
important because even if the ENABLE bit in the BDM is negated the CPU actually does execute
the BDM ROM code. It checks the ENABLE and returns if not set. If the BDM is not serviced by
the monitor then the breakpoint would be re-asserted when the BDM returns to normal CPU flow.
There is no hardware to enforce restriction of breakpoint operation if the BDM is not enabled.
15.3.1.3 BDM Dual Address Mode
Dual address-only breakpoints, each of which cause the part to enter background debug mode. In the
dual mode each address breakpoint is affected by the BKPM bit, the BKxALE bits, and the BKxRW and
BKxRWE bits. In dual address mode the BKDBE becomes an enable for the second address break-
point. The BKMBH and BKMBL bits will have no effect when in a dual address mode. BDM mode may
be entered by a breakpoint only if an internal signal from the BDM indicates background debug mode
is enabled. If BKPM = 1 then BKxRW, BKxRWE, BKMBH and BKMBL have no meaning.
Breakpoints are not allowed if the BDM mode is already active. Active mode means the CPU is
executing out of the BDM ROM.
BDM should not be entered from a breakpoint unless the ENABLE bit is set in the BDM. This is
important because even if the ENABLE bit in the BDM is negated the CPU actually does execute
the BDM ROM code. It checks the ENABLE and returns if not set. If the BDM is not serviced by
the monitor then the breakpoint would be re-asserted when the BDM returns to normal CPU flow.
There is no hardware to enforce restriction of breakpoint operation if the BDM is not enabled.
15.3.2 Registers
Breakpoint operation consists of comparing data in the breakpoint address registers (BRKAH/BRKAL)
to the address bus and comparing data in the breakpoint data registers (BRKDH/BRKDL) to the data
bus. The breakpoint data registers can also be compared to the address bus. The scope of comparison
can be expanded by ignoring the least significant byte of address or data matches.
The scope of comparison can be limited to program data only by setting the BKPM bit in breakpoint con-
trol register 0.
To trace program flow, setting the BKPM bit causes address comparison of program data only. Control
bits are also available that allow checking read/write matches.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK74CG117AFT | 90 MHz, OTHER CLOCK GENERATOR, PDSO48 |
| MC68HC08AS32ACFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HRC98JL3ECFA | 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48 |
| MC68HRC98JL3EMDW | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05C9AFN | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC916P1CAA16 | 功能描述:16位微控制器 - MCU 16B MCU 32K FLASH RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MC68HC916P1CFU16 | 制造商:Rochester Electronics LLC 功能描述:16BIT W/32KB FLASH EEPRO - Bulk |
| MC68HC916P1VAA16 | 功能描述:IC MCU 32K FLASH 16MHZ 80-QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC16 標(biāo)準(zhǔn)包裝:1 系列:AVR® ATmega 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:32KB（16K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:1K x 8 RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:44-TQFP 包裝:剪切帶 (CT) 其它名稱:ATMEGA324P-B15AZCT |
| MC68HC916P3CFU16 | 制造商:Rochester Electronics LLC 功能描述:16BIT MCU FOR GENERAL - Bulk |
| MC68HC98LJ12CFU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。