參數(shù)資料
型號： MC68HC711D3MFN3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 75/157頁
文件大小： 2252K
代理商： MC68HC711D3MFN3
Operating Modes and Memory
Data Sheet
MC68HC711D3 — Rev. 2
24
Operating Modes and Memory
MOTOROLA
2.3 Memory Map
Figure 2-1 illustrates the memory map for both normal modes of operation
(single-chip and expanded-multiplexed), as well as for both special modes of
operation (bootstrap and test).
In the single-chip mode, the MCU does not generate external addresses.
The internal memory locations are shown in the shaded areas, and the
contents of these shaded areas are explained on the right side of the
diagram.
In expanded-multiplexed mode, the memory locations are basically the
same as in the single-chip mode except that the memory locations between
shaded areas are for externally addressed memory and I/O.
The special bootstrap mode is similar to the single-chip mode, except that
the bootstrap program ROM is located at memory locations $BF00–$BFFF,
vectors included.
The special test mode is similar to the expanded-multiplexed mode except
the interrupt vectors are at external memory locations.
Figure 2-1. MC68HC711D3 Memory Map
SINGLE
CHIP
SPECIAL
TEST
EXPANDED
192 BYTES STATIC RAM
INTERNAL REGISTERS AND I/O
SPECIAL MODES
INTERRUPT
VECTORS
4 KBYTES PROM (ROM)
256-BYTES
BOOT ROM
$BFC0
$BFFF
$BF00
$BFFF
$7000
$7FFF
$0040
$00FF
$0000
$003F
$0000
$1000
$2000
$3000
$4000
$5000
$6000
$7000
$8000
$9000
$A000
$B000
$C000
$D000
$E000
$F000
$FFFF
MULTIPLEXED
BOOTSTRAP
EXTERNAL
(MAY BE MAPPED TO ANY 4-K BOUNDARY
USING INIT REGISTER)
(MAY BE MAPPED TO ANY 4-K BOUNDARY
USING THE INIT REGISTER)
PRESENT AT RESET AND MAY BE DISABLED BY
EPON (ROM ON) BIT IN CONFIG REGISTER.
INTERRUPT VECTORS ARE EXTERNAL.
NORMAL MODES
INTERRUPT
VECTORS
4-KBYTES
PROM (ROM)
$BFC0
$BFFF
$BF00
$BFFF
MODB
MODA
Mode Selected
1
0
1
0
1
Single-chip (mode 0)
Expanded multiplexed (mode 1)
Special bootstrap
Special test
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