參數(shù)資料
型號: MC68HC11D0CFNE3R
廠商: Freescale Semiconductor
文件頁數(shù): 73/124頁
文件大小: 0K
描述: MCU 8-BIT 192 RAM 3MHZ 44-PLCC
標(biāo)準(zhǔn)包裝: 450
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 3MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 26
程序存儲器類型: ROMless
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 帶卷 (TR)
RESETS AND INTERRUPTS
5-8
TECHNICAL DATA
The IRVNE control bit allows internal read accesses to be available on the external
data bus during factory testing or emulation. Refer to SECTION 4 OPERATING
MODES AND ON-CHIP MEMORY for more information.
PSEL[3:0] — Priority Select Bits
These bits select one interrupt source to be elevated above all other I-bit-related
sources and can be written to only while the I bit in the CCR is set (interrupts disabled).
5.4 Interrupts
The MCU has 18 interrupt vectors that support 22 interrupt sources. The 19 maskable
interrupts are generated by on-chip peripheral systems. These interrupts are recog-
nized when the global interrupt mask bit (I) in the condition code register (CCR) is
clear. The three non-maskable interrupt sources are illegal opcode trap, software in-
terrupt, and XIRQ pin. Refer to Table 5-4, which shows the interrupt sources and vec-
tor assignments for each source.
Table 5-3 Highest Priority Interrupt Selection
PSEL[3:0]
Interrupt Source Promoted
0 0 0 0
Timer Overflow
0 0 0 1
Pulse Accumulator Overflow
0 0 1 0
Pulse Accumulator Input Edge
0 0 1 1
SPI Serial Transfer Complete
0 1 0 0
SCI Serial System
0 1 0 1
Reserved (Default to IRQ)
0 1 1 0
IRQ (External Pin)
0 1 1 1
Real-Time Interrupt
1 0 0 0
Timer Input Capture 1
1 0 0 1
Timer Input Capture 2
1 0 1 0
Timer Input Capture 3
1 0 1 1
Timer Output Compare 1
1 1 0 0
Timer Output Compare 2
1 1 0 1
Timer Output Compare 3
1 1 1 0
Timer Output Compare 4
1 1 1 1
Timer Input Capture 4/Output Compare 5
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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