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參數(shù)資料
| 型號： | MC68HC11C0FN3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 3 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 61/76頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MC68HC11C0FN3 |
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MOTOROLA
MC68HC11C0
64
MC68HC11C0TS/D
RCKB — SCI Baud Rate Clock Check
RCKB can only be set in test modes.
1 = Exclusive-OR of the RT clock driven out TxD pin for testing purposes.
0 = Normal SCI operation
SCR2, SCR1, and SCR0 — SCI Baud Rate Selects
Selects receiver and transmitter bit rate based on output from baud rate prescaler stage. Shaded boxes
in the table below contain the prescaler output rates shown in the preceding table. Refer to the SCI Baud
Rate Clock Diagram.
R8 — Receive Data Bit 8
When the M-bit is set, R8 stores the ninth data bit in the receive data character. R8 can also be used
with 8-bit data to support several special receive data formats. R8 remains unchanged following a trans-
mission and may be used again without rewriting it.
T8 — Transmit Data Bit 8
When the M-bit is set, T8 stores the ninth data bit in the transmit data character. T8 can also be used
with 8-bit data to support several special transmit data formats. T8 remains unchanged following a
transmission and may be used again without rewriting it.
Bit 5 — Not implemented
Always reads zero
Crystal Frequency in MHz
SCP[1:0]
Divide Internal
Clock By
4.0 MHz
(Baud)
8.0 MHz
(Baud)
12.0 MHz
(Baud)
0 0
1
62.50 K
125.0 K
187.5 K
0 1
3
20.83 K
41.67 K
62.5 K
1 0
4
15.625 K
31.25 K
46.88 K
1 1
13
4800 K
9600 K
14.4 K
Divide
Prescaler
By
Baud Rate
(Prescaler Output from Previous Table)
SCR[2:0]
4800 K
9600 K
14.4 K
0 0 0
1
4800
9600
14.4
0 0 1
2
2400
4800
7200
0 1 0
4
1200
2400
3600
0 1 1
8
600
1200
1800
1 0 0
16
300
600
1200
1 0 1
32
150
300
450
1 1 0
64
75
150
225
1 1 1
128
37.5
75
112.5
SCCR1 — SCI Control Register 1
$002C
Bit 7
654321
Bit 0
R8
T8
—
M
WAKE
—
RESET:
U
000000
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