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參數(shù)資料
| 型號： | MC68HC11C0FN3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 3 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 32/76頁 |
| 文件大?。?/td> | 394K |
| 代理商： | MC68HC11C0FN3 |
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MOTOROLA
MC68HC11C0
38
MC68HC11C0TS/D
IRQE — IRQ Select Edge Sensitive Only
0 = Low level recognition
1 = Falling edge recognition
DLY — Enable Oscillator Start-Up Delay on Exit from STOP
0 = No stabilization delay on exit from STOP
1 = Stabilization delay enabled on exit from STOP
CME — Clock Monitor Enable
0 = Clock monitor disabled; slow clocks can be used
1 = Slow or stopped clocks cause clock failure reset
Bit 2 — Not implemented
Always reads zero
CR[1:0] — COP Timer Rate Select
Refer to the following table of COP timer rates.
Bits [7:4] — Not implemented
Always read zero
NOSEC — COP System Disable
Refer to 3 On-Chip Memory.
NOCOP — COP System Disable
Resets to programmed value
0 = COP enabled (forces reset on time-out)
1 = COP disabled (does not force reset on time-out)
ROMON — ROM/EPROM Enable
Refer to 3 On-Chip Memory.
EEON — COP System Disable
Refer to 3 On-Chip Memory.
Table 7 COP Timer Rate Select
CR[1:0]
Divide
E By
XTAL = 4.0 MHz
Time-out
–0 ms, +32.8 ms
XTAL = 8.0 MHz
Time-out
–0 ms, +16.4 ms
XTAL = 12.0 MHz
Time-out
–0 ms, +10.9 ms
0 0
215
32.768 ms
16.384 ms
10.923 ms
0 1
217
131.072 ms
65.536 ms
43.691 ms
1 0
219
524.288 ms
262.140 ms
174.76 ms
1 1
221
2.097 s
1.049 s
699.05 ms
E =
1.0 MHz
2.0 MHz
3.0 MHz
CONFIG — System Configuration Register
$003F
Bit 7
654321
Bit 0
————
NOSEC
NOCOP
ROMON
EEON
RESET:
00001111
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