參數(shù)資料
型號: MC68HC11C0FN3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 3 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 53/76頁
文件大?。?/td> 394K
代理商: MC68HC11C0FN3
MC68HC11C0
MOTOROLA
MC68HC11C0TS/D
57
10 Serial Subsystems
The MC68HC11C0 contains two serial communication subsystems that allow the MCU to transfer data
to and from other devices. One system, the serial communications interface (SCI), is an asynchronous
nonreturn to zero (NRZ) serial system that supports single-wire data transmissions. The second sys-
tem, the serial peripheral interface (SPI), is a synchronous master/slave system that allows data to be
both transmitted and received simultaneously.
As in other M68HC11 MCUs, the serial systems are implemented as alternate functions of port D pins.
However, the interrupt request lines found elsewhere on other M68HC11 MCUs are now a third function
of port D pins. Therefore, two additional registers are associated with port D on the MC68HC11C0. The
port D I/O control register (DIOCTL) and the port D output mode register (DODM) have been added.
Briefly, DIOCTL controls the function performed by each port D pin. The DODM register controls the
output driver type for each port D pin. Refer to the following descriptions of PORTD, DDRD, DIOCTL,
and DODM registers.
Bits [7:6] — Not implemented
Always read zero
DDD[5:0] — Data Direction for Port D
0 = Input
1 = Output
Bits [7:6] — Not implemented
Always read zero
DIO[5:2] — Port D I/O Control for Port D Bits [5:2]
Refer to the following tables for description.
Bit 1 — Not implemented
Always reads zero
DIO0 — Port D I/O Control for Port D Bit 0
Refer to the following tables for description.
PORTD — Port D Data
$0008
Bit 7
654321
Bit 0
PD5
PD4
PD3
PD2
PD1
PD0
RESET:
0
IIIII
I
Alt. Pin
Func.:
SS
SCK
SDO/
MOSI
SDI/
MISO
TxD
RxD
or:
IRQ
XIRQ
DDRD — Data Direction Register for Port D
$0009
Bit 7
654321
Bit 0
DDD5
DDD4
DDD3
DDD2
DDD1
DDD0
RESET:
00000000
DIOCTL — Port D I/O Control
$0007
Bit 7
654321
Bit 0
DIO5
DIO4
DIO3
DIO2
DIO0
RESET:
00111100
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