參數(shù)資料
型號(hào): MC68HC11A8VCFU2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP64
封裝: QFP-64
文件頁(yè)數(shù): 4/158頁(yè)
文件大小: 776K
代理商: MC68HC11A8VCFU2
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MOTOROLA
iv
MC68HC11A8
TECHNICAL DATA
3.5.2
3.5.2.1
3.5.2.2
3.5.2.3
3.5.2.4
3.5.2.5
3.5.3
3.5.3.1
3.5.3.2
Programming/Erasing Internal EEPROM ..........................................3-7
Read ..........................................................................................3-7
Programming .............................................................................3-7
Bulk Erase .................................................................................3-8
Row Erase .................................................................................3-8
Byte Erase .................................................................................3-9
System Configuration Register (CONFIG) ........................................3-9
Programming and Erasure of the CONFIG Register ...............3-10
Operation of the Configuration Mechanism .............................3-12
4 PARALLEL I/O
4.1
4.2
4.3
4.3.1
4.3.2
4.4
4.4.1
4.4.2
4.5
General-Purpose I/O (Ports C and D) .......................................................4-1
Fixed Direction I/O (Ports A, B, and E) ......................................................4-1
Simple Strobed I/O ....................................................................................4-2
Strobed Input Port C ..........................................................................4-2
Strobed Output Port B .......................................................................4-2
Full Handshake I/O ....................................................................................4-2
Input Handshake Protocol .................................................................4-3
Output Handshake Protocol ..............................................................4-3
Parallel I/O Control Register (PIOC) .........................................................4-4
5 SERIAL COMMUNICATIONS INTERFACE
5.1
5.1.1
5.1.2
5.1.3
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.8.1
5.8.2
5.8.3
5.8.4
5.8.5
Overview and Features .............................................................................5-1
SCI Two-Wire System Features ........................................................5-1
SCI Receiver Features ......................................................................5-1
SCI Transmitter Features ..................................................................5-1
Data Format ..............................................................................................5-1
Wake-Up Feature ......................................................................................5-2
Receive Data (RxD) ..................................................................................5-2
Start Bit Detection .....................................................................................5-3
Transmit Data (TxD) ..................................................................................5-5
Functional Description ...............................................................................5-5
SCI Registers ............................................................................................5-5
Serial Communications Data Register (SCDR) .................................5-6
Serial Communications Control Register 1 (SCCR1) ........................5-8
Serial Communications Control Register 2 (SCCR2) ........................5-8
Serial Communications Status Register (SCSR) ............................5-10
Baud Rate Register (BAUD) ............................................................5-11
6 SERIAL PERIPHERAL INTERFACE
6.1
6.2
6.2.1
6.2.2
6.2.3
Overview and Features .............................................................................6-1
SPI Signal Descriptions .............................................................................6-1
Master In Slave Out (MISO) ..............................................................6-1
Master Out Slave In (MOSI) ..............................................................6-1
Serial Clock (SCK) ............................................................................6-2
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