
Central Processor Unit (CPU)
MC68HC08AZ32
66
Central Processor Unit (CPU)
MOTOROLA
NEG opr
NEGA
NEGX
NEG oprX
NEG ,X
NEG oprSP
Negate (Two’s Complement)
M
←
–(M) = $00 – (M)
A
←
–(A) = $00 – (A)
X
←
–(X) = $00 – (X)
M
←
–(M) = $00 – (M)
M
←
–(M) = $00 – (M)
¤
– –
¤
¤
¤
DIR
INH
INH
IX1
IX
SP1
30
40
50
60
70
9E60
dd
ff
ff
4
1
1
4
3
5
NOP
No Operation
None
– – – – – – INH
9D
1
NSA
Nibble Swap A
A
←
(A[3:0]:A[7:4])
– – – – – – INH
62
3
ORA #opr
ORA opr
ORA opr
ORA oprX
ORA oprX
ORA ,X
ORA oprSP
ORA oprSP
Inclusive OR A and M
A
←
(A) | (M)
0 – –
¤
¤
–
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
AA
BA
CA
DA
EA
FA
9EEA
9EDA
ii
dd
hh ll
ee ff
ff
ff
ee ff
2
3
4
4
3
2
4
5
PSHA
Push A onto Stack
Push (A); SP
←
(SP
) –
1
– – – – – – INH
87
2
PSHH
Push H onto Stack
Push (H)
;
SP
←
(SP
) –
1
– – – – – – INH
8B
2
PSHX
Push X onto Stack
Push (X)
;
SP
←
(SP
) –
1
– – – – – – INH
89
2
PULA
Pull A from Stack
SP
←
(SP +
1); Pull
(
A
)
– – – – – – INH
86
2
PULH
Pull H from Stack
SP
←
(SP +
1); Pull
(
H
)
– – – – – – INH
8A
2
PULX
Pull X from Stack
SP
←
(SP +
1); Pull
(
X
)
– – – – – – INH
88
2
ROL opr
ROLA
ROLX
ROL oprX
ROL ,X
ROL oprSP
Rotate Left through Carry
¤
– –
¤
¤
¤
DIR
INH
INH
IX1
IX
SP1
39
49
59
69
79
9E69
dd
ff
ff
4
1
1
4
3
5
ROR opr
RORA
RORX
ROR oprX
ROR ,X
ROR oprSP
Rotate Right through Carry
¤
– –
¤
¤
¤
DIR
INH
INH
IX1
IX
SP1
36
46
56
66
76
9E66
dd
ff
ff
4
1
1
4
3
5
RSP
Reset Stack Pointer
SP
←
$FF
– – – – – – INH
9C
1
RTI
Return from Interrupt
SP
←
(SP) + 1; Pull (CCR)
SP
←
(SP) + 1; Pull (A)
SP
←
(SP) + 1; Pull (X)
SP
←
(SP) + 1; Pull (PCH)
SP
←
(SP) + 1; Pull (PCL)
¤
¤
¤
¤
¤
¤
INH
80
7
RTS
Return from Subroutine
SP
←
SP + 1
;
Pull
(
PCH)
SP
←
SP + 1; Pull (PCL)
– – – – – – INH
81
4
Table 1 Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
V H I N Z C
C
b0
b7
b0
b7
C
14-cpu