
Serial Communications Interface Module (SCI)
MC68HC08AZ32
176
Serial Communications Interface Module (SCI)
MOTOROLA
Break characters
Writing a ’1’ to the send break bit, SBK, in SCC2 loads the transmit shift
register with a break character. A break character contains all ’0’s and
has no start, STOP, or parity bit. Break character length depends on the
M bit in SCC1. As long as SBK is at ’1’, transmitter logic continuously
loads break characters into the transmit shift register. After software
clears the SBK bit, the shift register finishes transmitting the last break
character and then transmits at least one ’1’. The automatic ’1’ at the end
of a break character guarantees the recognition of the start bit of the next
character.
The SCI recognizes a break character when a start bit is followed by
8 or 9 ’0’ data bits and a ’0’ where the STOP bit should be. Receiving
a break character has the following effects on SCI registers:
Sets the framing error bit (FE) in SCS1
Sets the SCI receiver full bit (SCRF) in SCS1
Clears the SCI data register (SCDR)
Clears the R8 bit in SCC3
Sets the break flag bit (BKF) in SCS2
May set the overrun (OR), noise flag (NF), parity error (PE), or
reception in progress flag (RPF) bits
Table 2. SCI transmitter I/O register summary
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Addr.
SCI Control Register 1 (SCC1) LOOPS ENSCI
TXINV
M
WAKE
ILTY
PEN
PTY
$0013
SCI Control Register 2 (SCC2) SCTIE
TCIE
SCRIE
ILIE
TE
RE
RWU
SBK
$0014
SCI Control Register 3 (SCC3)
R8
T8
DMARE DMATE
ORIE
NEIE
FEIE
PEIE
$0015
SCI Status Register 1 (SCS1) SCTE
TC
SCRF
IDLE
OR
NF
FE
PE
$0016
SCI Data Register (SCDR)
$0018
SCI Baud Rate Register (SCBR)
SCP1
SCP0
SCR2
SCR1
SCR0 $0019
= Unimplemented
8-sci