參數(shù)資料
型號: MC68HC05J1AVDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 9/126頁
文件大?。?/td> 1118K
代理商: MC68HC05J1AVDWR2
Technical Data
MC68HC05J1A — Rev. 1.0
106
Electrical Specifications
MOTOROLA
Electrical Specications
Figure 10-10. Power-On Reset Timing
Figure 10-11. External Reset Timing
1FFE
4064 tCYC
VDD
OSC1 PIN
INTERNAL
CLOCK
INTERNAL
ADDRESS BUS
Notes:
INTERNAL
DATA BUS
1FFE
1FFF
(NOTE 1)
1. Power-on reset threshold is typically between 1 V and 2 V.
2. Internal clock, internal address bus, and internal data bus are not available externally.
NEW
PCH
NEW
PCL
INTERNAL
CLOCK
INTERNAL
ADDRESS BUS
Notes:
INTERNAL
DATA BUS
1FFE
1FFF
NEW PC
1. Internal clock, internal address bus, and internal data bus are not available externally.
2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence.
NEW
PCH
tRL
NEW PC
NEW
PCL
DUMMY
OP
CODE
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