參數(shù)資料
型號: MC68HC05J1AVDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 66/126頁
文件大?。?/td> 1118K
代理商: MC68HC05J1AVDWR2
Technical Data
MC68HC05J1A — Rev. 1.0
44
Interrupts
MOTOROLA
Interrupts
4.3.3 Timer Interrupts
The multifunction timer can generate these interrupts:
Timer overflow interrupt
Real-time interrupt
Setting the I bit in the condition code register disables timer interrupts.
4.3.3.1 Timer Overflow Interrupt
A timer overflow interrupt request occurs if the timer overflow flag, TOF,
becomes set while the timer overflow interrupt enable bit, TOIE, is also
4.3.3.2 Real-Time Interrupt
A real-time interrupt request occurs if the real-time interrupt flag, RTIF,
becomes set while the real-time interrupt enable bit, RTIE, is also set.
4.4 Interrupt Processing
The CPU takes these actions to begin servicing an interrupt:
Stores the CPU registers on the stack in the order shown
Sets the I bit in the condition code register to prevent further
interrupts
Loads the program counter with the contents of the appropriate
interrupt vector locations:
$07FC and $07FD (software interrupt vector)
$07FA and $07FB (external interrupt vector)
$07F8 and $07F9 (timer interrupt vector)
The return-from-interrupt (RTI) instruction causes the CPU to recover
the CPU registers from the stack as shown in Figure 4-3.
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