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| 型號(hào)： | MC68HC05F8FU |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 1.8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 85/126頁(yè) |
| 文件大?。?/td> | 1084K |
| 代理商： | MC68HC05F8FU |
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MC68HC05F8
MOTOROLA
6-13
TIMERS
6
6.3
COP WATCHDOG
A COP (Computer Operating Properly) Watchdog Timer is implemented to restore system
operation in the event of system lock-up. This timer consists of a counter which is clocked by a
4Hz signal; the time-out period is software programmable to approximately 0.5, 1, 2 or 4 seconds
(default time out period is 0.5s after a reset). A watchdog reset occurs when the Watchdog Timer
times out, unless the timer is periodically reset by writing to the Watchdog Timer Control Status
register.
6.3.1
Watchdog Timer Time-Out Flag
A watchdog time-out ag (WDTOF) is provided in the Watchdog Control Status register (WDCSR,
$36), to allow the user to distinguish between a normal reset (power-on-reset or external reset)
and a Watchdog Timer reset. This bit is a logic “1” if the reset was due to a watchdog time-out and
logic “0” for a normal reset; and is cleared by reading the WDCSR register. Writing a logic “1” to
this bit has no effect on its value other than resetting the watchdog timer counter.
Figure 6-7 Watchdog Timer Block Diagram
WATCHDOG CONTROL REGISTER
WDT1
WDT0
WDTOF
KWDT
WDTE
MC68HC05F8 INTERNAL BUS
&
+
WATCHDOG
TIMER COUNTER
TIME-OUT DETECTOR
TIME-OUT
VALUE
ACTIVE
LOGIC
WAKE-UP
4Hz CLOCK
WDTOF
RESET
STOPM
WAITM
TPG
59
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC68HC05J1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
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