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參數(shù)資料
| 型號： | MC68HC05F8B |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 1.8 MHz, MICROCONTROLLER, PDIP56 |
| 封裝： | PLASTIC, SDIP-56 |
| 文件頁數(shù)： | 104/126頁 |
| 文件大?。?/td> | 1084K |
| 代理商： | MC68HC05F8B |
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MC68HC05F8
MOTOROLA
8-9
MANCHESTER ENCODER/DECODER
8
NCC - Encoding Completion Flag
This bit is set to indicate that no data transmitting or encoding is in progress. It is set when one of
the following cases occurs:
1) The encoder is disabled, i.e. NCE=0, transmission of the data in the encode
data shift register is completed.
2) The encoder is enabled, NCE=1, the encode data register is empty
(NCM=1) and transmission of the data in the encode data shift register is
completed.
Writing to the Encoder Data register when the NCE bit is set clears this ag. Reset or clearing the
NCE bit sets this NCC bit.
DCF - Decoder Data Register Full Flag
This bit is set when one byte of data is received with end pattern veried, and an interrupt is
generated if the decoder interrupt is enabled (DIE=1). This ag is cleared when the Status register
is accessed (with DCF set) followed by a read of the Decode Data register, or by clearing the DCE
bit.
OVF - Overrun Flag
When an overrun occurs, this ag is set, and an interrupt is generated if the decode interrupt is
enabled. Clearing the DCE bit will reset the decoder and thus clearing this ag. See
Section 8.2.2.1 for denition of an overrun condition.
8.3.3
Encode Data Register ($2D)
This is a write only register. Data written to this register will be encoded to Manchester format and
then transmitted out to the ENCOOUT pin in sequential format.
8.3.4
Decode Data Register ($2E)
The is a read only register. Data in Manchester format entering the DECOIN pin will be decoded
and the result placed in this register.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
$2D
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
$2E
TPG
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For More Information On This Product,
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Freescale Semiconductor, Inc.
For More Information On This Product,
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