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參數(shù)資料
| 型號(hào)： | MC68HC05E6VDWR2 |
| 廠(chǎng)商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | PLASTIC, SOIC-28 |
| 文件頁(yè)數(shù)： | 132/140頁(yè) |
| 文件大?。?/td> | 1141K |
| 代理商： | MC68HC05E6VDWR2 |
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Central Processing Unit
Addressing Modes
MC68HC05E6 — Rev. 1.0
MOTOROLA
Central Processing Unit
91
7-cpu
Immediate
Immediate instructions are those that contain a value to be used in an
operation with the value in the accumulator or index register. Immediate
instructions require no operand address and are two bytes long. The
opcode is the first byte, and the immediate data value is the second byte.
Direct
Direct instructions can access any of the first 256 memory locations with
two bytes. The first byte is the opcode, and the second is the low byte of
the operand address. In direct addressing, the CPU automatically uses
$00 as the high byte of the operand address.
Extended
Extended instructions use three bytes and can access any address in
memory. The first byte is the opcode; the second and third bytes are the
high and low bytes of the operand address.
When using the Motorola assembler, the programmer does not need to
specify whether an instruction is direct or extended. The assembler
automatically selects the shortest form of the instruction.
Indexed, No Offset
Indexed instructions with no offset are 1-byte instructions that can
access data with variable addresses within the first 256 memory
locations. The index register contains the low byte of the effective
address of the operand. The CPU automatically uses $00 as the high
byte, so these instructions can address locations $0000–$00FF.
Indexed, no offset instructions are often used to move a pointer through
a table or to hold the address of a frequently used RAM or I/O location.
Indexed, 8-Bit
Offset
Indexed, 8-bit offset instructions are 2-byte instructions that can access
data with variable addresses within the first 511 memory locations. The
CPU adds the unsigned byte in the index register to the unsigned byte
following the opcode. The sum is the effective address of the operand.
These instructions can access locations $0000–$01FE.
Indexed 8-bit offset instructions are useful for selecting the kth element
in an n-element table. The table can begin anywhere within the first 256
memory locations and could extend as far as location 510 ($01FE). The
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC705E6MFB | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC705E6CFB | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC705E6VDWR2 | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05E6VFB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC705E6VDW | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05E6VFB | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05F32 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:a member of the M68HC05 family of HCMOS |
| MC68HC05F32CFU | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:a member of the M68HC05 family of HCMOS |
| MC68HC05F32CPU | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:a member of the M68HC05 family of HCMOS |
| MC68HC05F32FU | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:a member of the M68HC05 family of HCMOS |
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