參數(shù)資料
型號: MC68HC05E6VDWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 113/140頁
文件大?。?/td> 1141K
代理商: MC68HC05E6VDWR2
Resets and Interrupts
MC68HC05E6 — Rev. 1.0
74
Resets and Interrupts
MOTOROLA
RESET pin to generate a power-on reset (POR). In this case, the time
constant must be great enough (at least 100ms) to allow the oscillator
circuit to stabilize.
RESET pin
When the oscillator is running in a stable state, the MCU is reset when a
logic zero is applied to the RESET input for a minimum period of 1.5
machine cycles (t
CYC). This pin contains an internal Schmitt trigger as
part of its input to improve noise immunity. When the RESET pin goes
high, the MCU will resume operation on the following cycle.
Computer
operating properly
(COP) reset
The MCU contains a watchdog timer that automatically times out if not
reset (cleared) within a specific time by a program reset sequence.
NOTE:
COP timeout is prevented by periodically writing a ‘0’ to bit 0 of address
$1FF0.
Figure 18 Reset timing diagram
VDD
RESET
1FFF
1FFE
New
1FFF
1FFE
PC
OSC1
New
PC
Internal
processor clock
1FFE
Op
code
New
PCL
New
PCH
tVDDR
Op
code
New
PCL
New
PCH
address bus
Internal
data bus
tOXOV
tCYC
tPORL
1FFE
Program
execution
begins
Program
execution
begins
tRL(or tDOGL)
(Internal power-on reset)
(External hardware reset)
VDD threshold (1-2V typical)
Reset sequence
2-resets
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