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參數(shù)資料
| 型號： | MC68CK338 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 32位微控制器 |
| 英文描述： | Highly Integrated, Low-Power, 32-Bit Microcontroller |
| 中文描述： | 高度集成，低功耗，32位微控制器 |
| 文件頁數(shù)： | 18/133頁 |
| 文件大小： | 798K |
| 代理商： | MC68CK338 |
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MOTOROLA
18
MC68CK338
MC68CK338TS/D
Figure 7 System Clock Filter Network
When the clock synthesizer is used, SYNCR determines the operating frequency of the MCU. The fol-
lowing equation relates the MCU operating frequency to the clock synthesizer reference frequency (f
ref
)
and the W, X, and Y fields in the SYNCR:
The W bit controls a prescaler tap in the feedback divider. Setting W increases VCO speed by a factor
of four. The Y field determines the count modulus for a modulo 64 downcounter, causing it to divide by
a value of Y+1. When W or Y changes, VCO frequency (f
VCO
) changes, and the VCO must relock.
The X bit controls a divide-by-two circuit that is not in the synthesizer feedback loop. When X=0 (reset
state), the divider is enabled, and the system clock is one-fourth the VCO frequency. Setting X=1
disables the divider, doubling the clock speed without changing the VCO frequency. There is no relock
delay when clock speed is changed by the X bit.
Internal VCO frequency is determined by the following equations:
or
For the MCU to operate correctly, system clock and VCO frequencies selected by the W, X, and Y bits
must be within the limits specified for the MCU. Do not use a combination of bit values that selects either
an operating frequency or a VCO frequency greater than the maximum specified values.
3.3.3 Clock Synthesizer Control
The clock synthesizer control circuits determine system clock frequency and clock operation under spe-
cial circumstances, such as following loss of synthesizer reference or during low-power operation. Clock
source is determined by the logic state of the MODCLK pin during reset.
NOTES:
1. Ensure that initialization software does not change the value of this bit (it should always be zero).
SYNCR —
Clock Synthesizer Control Register
$YFFA04
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
W
X
Y
EDIV
STCPU
0
RSVD
1
SLOCK
RSVD
1
STSIM
STEXT
RESET:
0
0
1
1
1
1
1
1
0
0
0
0
U
0
0
0
32 XFC CONN
*
MAINTAIN LOW LEAKAGE ON THE XFC NODE.
0.01
μ
F
0.1
μ
F
XFC
*
0.1
μ
F
C4
C3
C1
V
DDSYN
V
DDSYN
V
SSI
f
sys
4f
ref
Y
1
+
(
)
2
2W
(
X
+
)
=
f
VCO
4f
sys
if X = 0
=
f
VCO
2f
sys
if X = 1
=
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
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| MC68CM16Z1CPV16 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC16Z Series |
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