Communications Processor (CP)
MOTOROLA
MC68302 USER’S MANUAL
4-81
Figure 4-29. HDLC Interrupt Events Example
CTS—Clear-To-Send Status Changed
A change in the status of the CTS line was detected on the HDLC channel. The SCC sta-
tus register may be read to determine the current status.
CD—Carrier Detect Status Changed
A change in the status of the CD line was detected on the HDLC channel. The SCC status
register may be read to determine the current status.
7
6
5
4
3
2
1
0
CTS
CD
IDL
TXE
RXF
BSY
TXB
RXB
LINE IDLE
STORED IN RX BUFFER
FRAME
RECEIVED IN HDLC
TIME
RXD
CD
LINE IDLE
LINE IDLE
STORED IN
TX BUFFER
CTS
LINE IDLE
TXD
RTS
IDL
CD
CD
RXB
CTS
CTS
TXB
NOTES:
1. RXB event assumes receive buffers are 6 bytes each.
2. The second IDL event occurs after 15 ones are received in a row.
LEGEND:
F = Flag A = Address byte C = Control byte I = Information byte CR = CRC byte
NOTE: TXB event shown assumes all three bytes were put into a single buffer.
Example shows one additional opening flag. This is programmable.
HDLC SCCE
EVENTS
HDLC SCCE
EVENTS
FRAME
TRANSMITTED BY HDLC
F
A
A
C
I
CR CR
I
I
F
RXF
IDL
F
A
A
C
CR CR
F
F
