9- 28
M68040 USER’S MANUAL
MOTOROLA
The M68040FPSP SNAN exception handler checks to see if the instruction is an FMOVE
to byte, word, or long word. If one of these conditions is met, the M68040FPSP SNAN
exception handler stores the most significant 8, 16, or 32 bits, respectively, of the SNAN
mantissa, with the SNAN bit set, to the destination. Next, it determines whether or not the
user SNAN exception is enabled.
a. If the user SNAN exception is disabled, the M68040FPSP SNAN exception handler
checks for an INEX1 or INEX2 exception condition and determines whether or not it
needs to go to the user INEX exception handler. If not, the M68040FPSP returns to
normal instruction execution. Otherwise, the M68040FPSP SNAN exception handler
restores the FPU to its exceptional state, cleans up the stack to the conditions prior
to execution, and continues instruction execution at the user INEX exception
handler. No parameters are passed to the user INEX exception handler since the
M68040FPSP SNAN exception handler provides the illusion that it never existed.
b. If the user SNAN exception handler is enabled, the M68040FPSP SNAN exception
handler checks to see if the destination is a floating-point data register or in memory
(or an integer data register) with single-, double-, or extended-precision format. If so,
the M68040FPSP SNAN exception handler determines which input operand is the
SNAN, sets the SNAN bit in the NAN data format, and transfers the resulting
nonsignaling NAN to the destination. Once the destination has been written, the
M68040FPSP SNAN exception handler restores the FPU to its exceptional state,
cleans up the stack to the conditions prior to its execution, and continues instruction
execution at the user SNAN exception handler. No parameters are passed to the
user SNAN exception handler since the M68040FPSP SNAN exception handler
provides the illusion that it never existed.
The user SNAN exception handler must execute an FSAVE as the first floating-point
instruction. Table 9-16 lists the floating-point state frame fields for SNAN pre-instruction
exceptions resulting from the execution of opclass 010 or 000 (register-to-register or
memory-to-register) instructions, and for SNAN post-instruction exceptions resulting from
the execution of opclass 011 (register-to-memory) instructions defined for the use by the
supervisor exception handler. A source or destination SNAN is stored in ETEMP or
FPTEMP, respectively, with its SNAN bit set.
The user SNAN exception handler can overwrite the result to the specified destination.
The exception handler must be aware that it is possible for an INEX1 exceptional
condition to co-exist with an SNAN exception. Since the SNAN exception has higher
priority, the INEX1 exception is hidden, and it becomes the responsibility of the SNAN
exception handler to detect and correct this if desired. To return to normal execution, the
state frame is discarded prior to execution of the RTE of the user-defined exception
handler.
9.7.3 Operand Error
The operand error exception encompasses problems arising in a variety of operations,
including those errors not frequent or important enough to merit a specific exceptional
condition. Basically, an operand error occurs when an operation has no mathematical
interpretation for the given operands. Table 9-11 lists the possible operand errors, both
native and not native to the MC68040, which the M68040FPSP unimplemented instruction
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Freescale Semiconductor, Inc.
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