參數資料
型號： MC56F8346VFVER2
廠商： Freescale Semiconductor
文件頁數： 22/178頁
文件大?。?/td> 0K
描述： IC HYBRID CTRLR 16BIT 144-LQFP
標準包裝： 500
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 60MHz
連通性： CAN，EBI/EMI，SCI，SPI
外圍設備： POR，PWM，溫度傳感器，WDT
輸入/輸出數： 62
程序存儲器容量： 136KB（68K x 16）
程序存儲器類型： 閃存
RAM 容量： 6K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數據轉換器： A/D 16x12b
振蕩器型： 外部
工作溫度： -40°C ~ 105°C
封裝/外殼： 144-LQFP
包裝： 帶卷 (TR)
配用： MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
56F8346 Technical Data, Rev. 15
118
Freescale Semiconductor
Preliminary
6.5.7.2
Alternate GPIOB Peripheral Function Select for A23 (A23)—Bit 9
0 = Peripheral output function of GPIOB7 is defined to be A23
1 = Peripheral output function of GPIOB7 is defined to be the oscillator clock (MSTR_OSC, see
6.5.7.3
Alternate GPIOB Peripheral Function Select for A22 (A22)—Bit 8
0 = Peripheral output function of GPIOB6 is defined to be A22
1 = Peripheral output function of GPIOB6 is defined to be SYS_CLK2
6.5.7.4
Alternate GPIOB Peripheral Function Select for A21 (A21)—Bit 7
0 = Peripheral output function of GPIOB5 is defined to be A21
1 = Peripheral output function of GPIOB5 is defined to be SYS_CLK
6.5.7.5
Alternate GPIOB Peripheral Function Select for A20 (A20)—Bit 6
0 = Peripheral output function of GPIOB4 is defined to be A20
1 = Peripheral output function of GPIOB4 is defined to be the prescaler clock (FREF, see Figure 3-4)
6.5.7.6
Clockout Disable (CLKDIS)—Bit 5
0 = CLKOUT output is enabled and will output the signal indicated by CLKOSEL
1 = CLKOUT is tri-stated
6.5.7.7
CLockout Select (CLKOSEL)—Bits 4–0
Selects clock to be muxed out on the CLKO pin.
00000 = SYS_CLK (from OCCS - DEFAULT)
00001 = Reserved for factory test—56800E clock
00010 = Reserved for factory test—XRAM clock
00011 = Reserved for factory test—PFLASH odd clock
00100 = Reserved for factory test—PFLASH even clock
00101 = Reserved for factory test—BFLASH clock
00110 = Reserved for factory test—DFLASH clock
00111 = Oscillator output
01000 = Fout (from OCCS)
01001 = Reserved for factory test—IPB clock
01010 = Reserved for factory test—Feedback (from OCCS, this is path to PLL)
01011 = Reserved for factory test—Prescaler clock (from OCCS)
01100 = Reserved for factory test—Postscaler clock (from OCCS)
01101 = Reserved for factory test—SYS_CLK2 (from OCCS)
01110 = Reserved for factory test—SYS_CLK_DIV2
01111 = Reserved for factory test—SYS_CLK_D
10000 = ADCA clock
10001 = ADCB clock
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