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參數(shù)資料
| 型號： | MC141585 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 畫面疊加 |
| 英文描述： | Rad-Tolerant Class V, Floating Point Digital Signal Processor 429-CFCBGA -55 to 115 |
| 中文描述： | ON-SCREEN DISPLAY IC, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 13/27頁 |
| 文件大小： | 678K |
| 代理商： | MC141585 |
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MC141585
13
MOTOROLA
Frame Control Register Row 15 Coln 16
Bit 7-6 WW41, WW40 - It determines the shadow width
of the window 4 when the window shadowing function is
activated. Please refer to the following table for more
details where M is the actual pixel number of the shadow-
ing.
Bit 5-4 WW31, WW30 - Similarly as WW41, WW40,
these two bits determine the shadow width of the window 3
when the window shadowing function is activated.
Bit 3-2 WW21, WW20 - Similarly as WW41, WW40,
these two bits determine the shadow width of the window 2
when the window shadowing function is activated.
Bit 1-0 WW11, WW10 - Similarly as WW41, WW40,
these two bits determine the shadow width of the window 1
when the window shadowing function is activated
Frame Control Register Row 15 Coln 17
Bit 7-6 WH41, WH40 - It determines the shadow height
of the window 4 when the window shadowing function is
activated. Please refer to the following table for more
details where N is the actual line number of the shadowing.
Table 2. Shadow Width Setting
(WW41, WW40)
Shadow Width M
(unit in Pixel)
(0, 0)
2
(0, 1)
4
(1, 0)
6
(1, 1)
8
Table 3. Shadow Width Setting
(WH41, WH40)
Shadow Height N
(unit in Line)
(0, 0)
2
(0, 1)
4
(1, 0)
6
(1, 1)
8
Window Shadowing
N Horizontal Lines
M Pixels
M Pixels
WINDOW AREA
N Horizontal Lines
M and N are defined in the
frame control registers
located at row 15 column 16
and column 17.
Shadow color is defined by
by registers located at row 16
column 2 and 3.
NOTE:
7
ROW 15
COLN 16
6
5
4
3
2
1
0
WW20
WW21
WW10
WW11
WW40
WW41
WW30
WW31
7
ROW 15
COLN 17
6
5
4
3
2
1
0
WH20
WH21
WH10
WH11
WH40
WH41
WH30
WH31
Bit 5-4 WH31, WH30 - Similarly as WH41, WH40, these
two bits determine the shadow height of the window 3 when
the window shadowing function is activated.
Bit 3-2 WH21, WH20 - Similarly as WH41, WH40, these
two bits determine the shadow height of the window 2 when
the window shadowing function is activated.
Bit 1-0 WH11, WH10 - Similarly as WH41, WH40, these
two bits determine the shadow height of the window 1 when
the window shadowing function is activated.
Frame Control Register Row 15 Coln 18
Bit 7-3 RSPACE - These 5 bits define the row to row spac-
ing in unit of horizontal scan line. It means extra N lines,
defined by this 5-bit value, will be appended for each display
row. Because of the nonuniform expansion of BRM used by
character height control, this register is usually used to main-
tain the constant OSD menu height for different display
modes instead of adjusting the character height. The default
value of it is 0. It means there is no any extra line inserted
between row and row after power on. It can be used for Por-
trait monitor too when icon design is rotated 90 degree.
Bit 2
TRIC - Tri-state Control. This bit is used to control
the driving state of output pins, R, G, B and FBKG when the
OSD is disabled. After power on, this bit is reset and R, G, B
and FBKG are in high impedance state while OSD being dis-
abled. If it is set by MCU, these four output pins will drive low
while OSD being in disabled state. Basically, the setting is
dependent on the requirement of the external application cir-
cuit.
Bit 1
HPOL - This bit selects the polarity of the incom-
ing horizontal sync signal (HSYNC). If it is negative polarity,
clear this bit. Otherwise, set this bit to 1 to represent the pos-
itive H sync signal. After power on, this bit is cleared.
Bit 0
VPOL - This bit selects the polarity of the incom-
ing vertical sync signal (VSYNC). If it is negative polarity,
clear this bit. Otherwise, set this bit to 1 to represent the pos-
itive V sync signal. After power on, this bit is cleared.
NOTE: The registers located at column 19 of row 15
are reserved for the chip testing. In normal operation,
they should not be programmed anytime.
(IV) Special Control Registers
Chip Configuration Register(Row16, Coln0)
Bit 7
from Row 0 to Row 14 are all cleared but not affecting
Control registers..
CLR - By writing “1” to this bit, all display memory
7
ROW 15
COLN 18
6
5
4
3
2
1
0
VPOL
HPOL
TRIC
MSB
LSB
RSPACE
0
1
2
3
4
5
6
7
CLR
FSS
INV
FSW
VE
HE
DE
DIV
相關PDF資料 |
PDF描述 |
|---|---|
| MC14161B | SYNCHRONUS PRESETTABLE 4-BIT COUNTERS |
| MC14160BD | SYNCHRONUS PRESETTABLE 4-BIT COUNTERS |
| MC14160BL | SYNCHRONUS PRESETTABLE 4-BIT COUNTERS |
| MC14160B | Rad-Tolerant Class V, Floating Point Digital Signal Processor 429-CFCBGA -55 to 125 |
| MC14160BP | SYNCHRONUS PRESETTABLE 4-BIT COUNTERS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC141585DWE | 功能描述:IC LCD MONITOR OSD 16-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 電源管理 - 專用 系列:- 應用說明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:37 系列:- 應用:醫(yī)療用超聲波成像，聲納 電流 - 電源:- 電源電壓:2.37 V ~ 6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:56-WFQFN 裸露焊盤 供應商設備封裝:56-TQFN-EP（8x8） 包裝:管件 |
| MC141585DWER2 | 功能描述:IC LCD MONITOR OSD 16-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 電源管理 - 專用 系列:- 應用說明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:37 系列:- 應用:醫(yī)療用超聲波成像，聲納 電流 - 電源:- 電源電壓:2.37 V ~ 6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:56-WFQFN 裸露焊盤 供應商設備封裝:56-TQFN-EP（8x8） 包裝:管件 |
| MC14161BCPD | 制造商:Motorola Inc 功能描述: |
| MC14161BD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC141627FT | 制造商:Panasonic Industrial Company 功能描述:IC |
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