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參數(shù)資料
| 型號(hào)： | MB91314APMC-GE1 |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封裝： | 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120 |
| 文件頁(yè)數(shù)： | 21/73頁(yè) |
| 文件大?。?/td> | 810K |
| 代理商： | MB91314APMC-GE1 |
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MB91314A Series
28
CCR (Condition Code Register)
S : Stack flag
Cleared to 0 at a reset.
Set the flag to 0 for execution of the RETI instruction.
I : Interrupt Enable flag
Cleared to 0 at a reset.
N : Negative flag
Initial state by reset is irregular.
Z : Zero flag
Initial state by reset is irregular.
V : Overflow flag
Initial state by reset is irregular.
C : Carrying flag
Initial state by reset is irregular.
SCR (System Condition code Register)
D1, D0 : Flag for step division
Stores intermediate data for stepwise division operations.
T : Step trace trap flag
A flag specifying whether the step trace trap function is enabled or not.
The emulator uses the step trace trap function. The function cannot be used by the user program when using
the emulator.
ILM (Interrupt Level Mask Register)
This register stores the interrupt level mask value. The value in the ILM register is used as the level mask.
Initialized to 15 (01111B) by a reset.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 0
--00XXXXB
SV
bit 1
IN
Z
C
[Initial Value]
bit 10
bit 8
XX0B
D0
bit 9
D1
T
[Initial Value]
bit 20
bit 19
bit 18
bit 16
01111B
ILM1
bit 17
ILM4
ILM3
ILM2
ILM0
[Initial Value]
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相關(guān)代理商/技術(shù)參數(shù) |
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| MB91316 | 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
| MB91316A | 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
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| MB91316PMC-G-XXXE1 | 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
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