參數(shù)資料
型號： MB91314APMC-GE1
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP120
封裝： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件頁數(shù)： 15/73頁
文件大?。?/td> 810K
代理商： MB91314APMC-GE1
MB91314A Series
22
5) Notes on the PS register
Since some instructions write the information to PS register early time, the following exception operations may
cause a break to occur in an interrupt processing routine when using the debugger or the updating of the PS
flag. In either case, the processing is conducted properly again after return from an EIT, the operations before
and after the EIT are designed to perform as specified.
The following operations may be performed when the instruction immediately followed by a DIV0U/DIV0S
instruction results in (a) acceptance of a user interrupt, (b) single-stepping, or (c) a break in response to a
data event or emulator menu:
(1) D0 and D1 flags are updated in advance.
(2) An EIT handling routine (user interrupt, NMI, or emulator) is executed.
(3) Upon returning from the EIT, the DIV0U/DIV0S instructions are executed and the D0/D1 flags are updated
back to the original value held before step (1).
When a user interrupt source exists, executing either of the OR CCR, ST LIM and MOV Ri and PS instructions
to enable the interrupt results in the following operations:
(1) The PS register is updated in advance.
(2) An EIT handling routine (user interrupt) is executed.
(3) Upon returning from the EIT, the above instructions are executed and the PS registers are updated back to
the original value held before step (1).
6) Watchdog timer
The watchdog timer integrated in this model monitors the program to check that it delays a reset within a certain
period of time and, if the program runs out of control and fails to delay the reset, resets the CPU in place. Once
the watchdog timer is enabled, it keeps running until reset. As an exception, the watchdog timer delays the
reset automatically when a condition which stops program execution by the CPU develops. For those conditions
which correspond to this exception, refer to the function description of the watchdog timer in “HARDWARE MAN
UAL”. A watchdog reset may not be generated in the above situation caused by the system running out of
control. In that case, please reset (INIT) by external INIT terminal.
7) Notes on using the A/D converter
Although this series contains an A/D converter, do not apply a higher voltage to AVCC pin than to VDDE pin.
8) Software reset in synchronous mode
When using the software reset in synchronous mode, the following two conditions should be satisfied before
setting “0” to the SRST bit in STCR (standby control register) .
Set the interrupt enable flag (I-Flag) to the interrupt disable (I-Flag
= 0) .
Do not use NMI.
相關(guān)PDF資料
PDF描述
MB91353APMT RISC MICROCONTROLLER, PQFP120
MB91F355APMT-002 RISC MICROCONTROLLER, PQFP176
MB91352APMT RISC MICROCONTROLLER, PQFP120
MB91F353APMT RISC MICROCONTROLLER, PQFP120
MB91354APMT 32-BIT, MROM, 50 MHz, RISC MICROCONTROLLER, PQFP176
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB91316 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91316A 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91316APMC-G-XXXE1 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91316PMC-G-XXXE1 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers
MB91319 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit Microcontroller
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*