參數(shù)資料
型號(hào)： MB90M407PF
元件分類： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 34/68頁
文件大小： 1486K
代理商： MB90M407PF
MB90M405 Series
4
DS07-13718-3E
■ PRODUCT LINEUP
*1 : All FL-output pins (FIP0 to FIP59) have pull downs
*2 : Setting of DIP Switch (S2) when using emulation pod (MB2145-507) . Refer to “2.7 Dedicated Emulator Power
Supply” in the “MB2145-507 Hardware Manual” for details.
Part Number
MB90MF408*1
MB90M408*1
MB90M407*1
MB90MV405
Classification
Internal flash
memory type
Internal mask ROM type
Evaluation
ROM size
128 Kbytes
96 Kbytes
None onboard
RAM size
4 Kbytes
Emulator power supply*2
Included
CPU functions
Number of basic instructions
Minimum instruction execution time
Addressing modes
Program patch function
Maximum memory space
: 351
: 62.5 ns/4 MHz (with x4 multiplier)
: 23
: 2 address pointers
: 16 Mbytes
Ports
26 (CMOS) I/O ports (26 ports, also used for resources)
FL-control circuit
60 FL outputs possible (during LED control, 43 FL output and 17 LED control)
FL and LED driver control enabled
During FL driver control, both digit and segment dimmer setting possible
Serial I/O (UART)
Includes full-duplex double buffer
Clock-synchronized/asynchronous settings available
Can also be used as clock synchronized extended I/O serial
Also equipped with dedicated baud rate generator
Serial I/O: 2 channels, UART: 2 channels
16-bit reload timers
16-bit reload timer operation (can be set to toggle or one-shot output)
Event count function can be set
3 channels built in
16-bit I/O timer
One 16-bit output comparison channel (for clearing freerun timer)
Two 16-bit input capture channels
8/10 bit
A/D converter
16 channels (input multiplex)
Choice of 8 and 10-bit resolution available
Conversion time : 6.125
s (when machine clock operating at 16 MHz)
Watch clock
output circuit
Possible to divide external input oscillation clock and output externally
Programmable divisions : 32/64/128/256
I2C Bus
One I2C interface channel built in
DTP/external
interrupt
4 independent channels (also used with A/D input)
Interrupt factors : can be set to “L”
→“H” edge/“H”→“L” edge/“L” level/“H” level
Low-power modes
Sleep mode/timebase timer mode, stop mode, and intermittent CPU mode
Process
CMOS
Package
QFP-100 (0.65 mm pitch)
PGA256
Operating voltage
3.3 V
± 0.3 V (16 MHz : 4 MHz 4x)
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