參數(shù)資料
型號: MB90F574
廠商: Fujitsu Limited
英文描述: Octal Bus Transceivers And Registers With 3-State Outputs 28-LCCC -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 29/135頁
文件大小: 2504K
代理商: MB90F574
29
MB90570 Series
Descriptions for read/write
R/W: Readable and writable
R: Read only
W: Write only
Descriptions for initial value
0 : The initial value of this bit is “0”.
1 : The initial value of this bit is “1”.
X : The initial value of this bit is undefined.
– : This bit is unused. The initial value is undefined.
*1: This area is the only external access area having an address of 0000FF
H
or lower. An access operation to this
area is handled as that to external I/O area.
*2: For details of the RAM area, see “
I
MEMORY MAP”.
*3: The reserved area is disabled because it is used in the system.
Notes: For bits that is initialized by an reset operation, the initial value set by the reset operation is listed as an
initial value. Note that the values are different from reading results.
For LPMCR/CKSCR/WDTC, there are cases where initialization is performed or not performed, depending
on the types of the reset. However initial value for resets that initializes the value are listed.
The addresses following 0000FF
H
are reserved. No external bus access signal is generated.
Boundary ####
H
between the RAM area and the reserved area varies with the product model.
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MB90F574A Octal Bus Transceivers And Registers With 3-State Outputs 24-CFP -55 to 125
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