參數(shù)資料
型號: MB90F574/APFF
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, MICROCONTROLLER, PQFP120
封裝: PLASTIC, LQFP-120
文件頁數(shù): 56/120頁
文件大?。?/td> 1834K
代理商: MB90F574/APFF
MB90570 Series
40
3.
Watchdog Timer
The watchdog timer is a 2-bit counter operating with an output of the timebase timer and resets the CPU when
the counter is not cleared for a preset period of time.
(1) Register Configuration
(2) Block Diagram
Watchdog timer control register (WDTC)
Address
0000A8H
bit 15
bit 8
PONR STBR WRST ERST
SRST
WTE
WT1
WT0
(TBTC)
R:Read only
W:Write only
X:Indeterminate
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RR
R
W
............
Initial value
XXXXXXXX B
HCLK: Oscillation clock
PONR STBR WRST ERST SRST WTE
WT1
WT0
Watchdog timer control register (WDTC)
Start sleep mode
Start hold status
Start stop mode
CLR and start
Watchdog timer
Overflow
To internal reset
generation circuit
Counter clear
control circuit
Count clock
selector
2-bit
counter
Watchdog timer
reset generation
circuit
Clear
Divided-by-2
of HCLK
(Timebase timer counter)
× 21 × 22 ... × 28 × 29 × 210 × 211 × 212 × 213 × 214 × 215 × 216 × 217 × 218
CLR
2
4
CLR
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