參數(shù)資料
型號： MB90F372PMT-G
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144
封裝： 0.40 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 63/153頁
文件大?。?/td> 2503K
代理商： MB90F372PMT-G
MB90370 Series
17
■ BLOCK DIAGRAM
X0, X0A
RST
RAM
ROM
Note:
P00 to P07, P10 to P17, P20 to P27, P30 to P37: With registers that can be used as input pull-up resistors
PF0 to PF7: High current pins
F
2
M
C
-16L
X
bu
s
Clock control
Interrupt controller
DTP/External interrupt
circuit
CMOS I/O port 6,7
CMOS I/O port C,D
ROM correction
ROM mirroring
PC0/AN0/SW1
PC1/AN1/SW2
PC2/AN2/SW3
PC3/AN3 to
PC7/AN7
PD0/AN8 to
PD3/AN11
PD4/DA1
PD5/DA2
PD6/PPG2
PD7/PPG3
CPU
F2MC-16LX series core
Delayed interrupt generator
Timebase timer
AVR
A/D converter
12
(8/10 bit)
Reset circuit
(Watchdog timer)
Vss x 4, Vcc x 4, MD0-2, AVcc, AVss, CVcc, CVss
Other pins
6
X1, X1A
(Ch1,2,3)
16-bit reload timer
(Ch1,2,3,4)
16-bit PPG (Ch1)
P60/INT0 to
P65/INT5
P66/UCK1
P67/UO1
P70/UI1
P71/UCK2
P72/UO2
P73/UI2
P74/UCK3
P75/UO3
P76/UI3
P77/PPG1
6
LPC Interface
UPI
(Ch0,1,2,3)
GateA20 control
7
Bus
in
terfa
c
e
CMOS I/O port 5
P50/GA20
P51/LFRAME
P52/LRESET
P53/LCK
P54/LAD0
P55/LAD1
P56/LAD2
P57/LAD3
Serial IRQ (6 channels)
2
3CH PS/2 interface
6
N-ch open-drain I/O port 4
P40/PSCK0
P41/PSDA0
P42/PSCK1
P43/PSDA1
P44/PSCK2
P45/PSDA2
P46/CLKRUN
P47/SERIRQ
(P47 is CMOS I/O port)
Key-on wake-up
8
interrupt
CMOS I/O port 0,1,2,3*
P00/KSI0 to
P07/KSI7
P10 to P17
P20 to P27
P30 to P36
P37/ADTG
8
D/A converter
16-bit PPG
(Ch2,3)
2
LCD controller
(9SEG x 4COM)
PE0/TIN1/SEG0
PE1/TO1/SEG1
PE2/TIN2/SEG2
PE3/TO2/SEG3
PE4/TIN3/SEG4
PE5/TO3/SEG5
PE6/TIN4/SEG6
PE7/TO4/SEG7
PF0/SEG8*
PF1/COM0* to
PF4/COM3*
PF5/V1* to
PF7/V3*
CMOS I/O port E,F
Voltage comparator
8
Battery select circuit
7
Comparator
CVRH1, CVRH2, CVRL
CMOS I/O port A,B
PA0/ALR1 to
PA2/ALR3
PA3/ACO
PA4/OFB1 to
PA6/OFB3
PB0/DCIN
PB1/DCIN2
PB2/VOL1
PB3/VSI1
PB4/VOL2
PB5/VSI2
PB6/VOL3
PB7/VSI3
I2C bus
(Multi-address)
Bridge circuit
P80/SCL1
P81/SDA1
P82/ALERT
P90/SCL2
P91/SDA2
P92/SCL3
P93/SDA3
P94/SCL4
P95/SDA4
6
N-ch open-drain I/O port 8,9
16
3
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