參數(shù)資料
型號： MB90F372PMT-G
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144
封裝： 0.40 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 112/153頁
文件大小： 2503K
代理商： MB90F372PMT-G
MB90370 Series
61
9.
MI2C
The Multi-address I2C (Inter IC Bus) interface is a simple structure bidirectional bus consisting of two wires : a
serial data line (SDA) and a serial clock line (SCL). Among the devices connected with these two wires, infor-
mation is transmitted to one another. By recognizing the unique address of each device, it can operate as a
transmitting or receiving device in accordance with the function of each device. Among these devices, the master/
slave relation is established.
The Multi-address I2C interface can connect two or more devices to the bus provided the upper limit of the bus
capacitance does not exceed 400 pF. It is a full-fledged multi-master bus equipped with collision detection and
communication adjustment procedures designed to avoid the destruction of data if two or more masters attempt
to start data transfer simultaneously. This macro provides 6 addresses to implement the multi-address function.
The communication adjustment procedure permits only one master to control the bus when two or more masters
attempt to control the bus so that messages are not lost or the contents of messages are not changed. Multi-
master means that multiple masters attempt to control the bus simultaneously without losing messages.
This Multi-address I2C interface includes MCU standby mode wake-up function, and a CRC-8 calculator that
performs automatic Packet Error Code (PEC) generation and verification.
(1) Register configuration of MI2C
(Continued)
76
5
4
3
2
1
0
Address: 0000C2H
Address: 0000C3H
15
14
13
12
11
10
9
8
Multi-address I2C Bus Status Register (Lower)
Multi-address I2C Bus Status Register (Upper)
MBSRL
MBSRH
Initial value
Read/write
Bit number
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Initial value
Read/write
Bit number
WUF
TDR
TCR
MTR
STR
R
0
BB
R
0
RSC
R
0
AL
R
0
LRB
R
0
TRX
R
0
AAS
R
0
GCA
R
0
FBT
76
5
4
3
2
1
0
Address: 0000C0H
Address: 0000C1H
15
14
13
12
11
10
9
8
Multi-address I2C Bus Control Register (Lower)
Multi-address I2C Bus Control Register (Upper)
MBCRL
MBCRH
Initial value
Read/write
Bit number
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Initial value
Read/write
Bit number
BER
MSS
ACK
GCAA
INTE
INT
R/W
0
BEIE
R/W
0
PECE
R/W
0
LBT
R/W
0
WUE
R/W
0
SCC
-
R/W
0
RES
Address: 0000C4H
76
5
4
3
2
1
0
Multi-address I2C Data Register
MDAR
Bit number
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Initial value
Read/write
D7
D6
D5
D4
D3
D2
D1
D0
PMATCH
0
R
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