參數(shù)資料
型號(hào): MB89F051PMC
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP64
封裝: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 5/40頁
文件大?。?/td> 931K
代理商: MB89F051PMC
MB89051 Series
DS07-12551-3E
13
■ PROGRAMMING AND ERASING FLSH MEMORY
1.
Flash Memory
The flash memory is located between 8000H and FFFFH in the CPU memory map and incorporates a flash
memory interface circuit that allows read access and program access from the CPU to be performed in the same
way as mark ROM. Programming and erasing flash memory is also performed via the flash memory interface
circuit by executing instructions in the CPU. This enables the flash memory to be updated in place under the
control of the CPU, providing an efficient method of updating program and data.
2.
Flash Memory Features
32 Kbyte
× 8-bit configuration (16 K + 8 K + 8 K sectors)
Automatic programming algorithm (Embedded Algorithm : Equivalent to MBM29LV200)
Includes an erase pause and restart function
Data polling and toggle bit for detection of program/erase completion
Detection of program/erase completion via CPU interrupt
Compatible with JEDEC-standard command
Sector Protection (sectors can be combined in any combination)
No. of program/erase cycles : 10,000 (Min)
3.
Procedure for Programming and Erasing Flash Memory
Programming and reading flash memory cannot be performed at the same time. Accordingly, to program or
erase flash memory, the program must first be copied from flash memory to RAM so that programming can be
performed without program access from flash memory.
4.
Flash Memory Register
Control status register (FMCS)
5.
Sector Configuration
The table below shows the sector configuration of flash memory and lists the addresses of each sector for both
during CPU access and a flash memory programming.
Sector configuration of flash memory
* : Programmer address
The programmer address is the address to be used instead of the CPU address when programming data from
a parallel flash memory programmer. Use the programmer address on programming or erasing using a general-
purpose parallel programmer.
Flash Memory
CPU Address
Programmer Address*
16 Kbytes
FFFFH to C000H
1FFFFH to 1C000H
8 Kbytes
BFFFH to A000H
1BFFFH to 1A000H
8 Kbytes
9FFFH to 8000H
19FFFH to 18000H
R
R/W
RDY
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
002EH
000X00X0B
R/W
R/W
INTE RDYINT
WE
Re-
served
Re-
served
Re-
served
Initial value
Address
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