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參數(shù)資料
| 型號(hào)： | MB89F051PMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 14/40頁 |
| 文件大?。?/td> | 931K |
| 代理商： | MB89F051PMC |
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MB89051 Series
DS07-12551-3E
21
(Continued)
Information about read/write
R/W: Read/write enabled, R: Read only, W: Write only
Information about initial values
0: The initial value of this bit is “0”.
1: The initial bit of this bit is “1”.
X: The initial value of this bit is undefined.
Note : Vacancies and reserved spaces are not for use.
Address
Register
name
Register description
Read/write
Initial value
56H
Reserved area
57H
TDCR3
Transfer data count register 3
R/W
X 0 0 0 0 0 0 0
58H
UCTR
USB control register
R/W
0 0 0 0 0 0 0 0
59H
USTR1
USB status register 1
R/W
0 0 0 0 0 0 0 0
5AH
USTR2
USB status register 2
R
XXXXXX 0 0
5BH
UMSKR
USB interrupt mask register
R/W
0 0 0 0 0 0 0 0
5CH
UFRMR1
USB frame status register 1
R
XXXXXXXX
5DH
UFRMR2
USB frame status register 2
R
XXXXXXXX
5EH
EPER
USB endpoint enable register
R/W
XXXX 0 0 0 1
5FH
EPBR0
End point setup register 0
R/W
X 0 0 0 0 0 0 0
60H
EPBR11
Endpoint setup register 11
R/W
XX 0 0 0 0 XX
61H
EPBR12
Endpoint setup register 12
R/W
X 0 0 0 0 0 0 0
62H
EPBR21
Endpoint setup register 21
R/W
XX 0 0 0 0 XX
63H
EPBR22
Endpoint setup register 22
R/W
X 0 0 0 0 0 0 0
64H
EPBR31
Endpoint setup register 31
R/W
XX 0 0 0 0 XX
65H
EPBR32
Endpoint setup register 32
R/W
X 0 0 0 0 0 0 0
66H
Reserved area
67H to 78H
Vacancy
79H
Reserved area
7AH
Vacancy
7BH
ILR1
Interrupt level setting register 1
W
1 1 1 1 1 1 1 1
7CH
ILR2
Interrupt level setting register 2
W
1 1 1 1 1 1 1 1
7DH
ILR3
level setting register 3
W
1 1 1 1 1 1 1 1
7EH
ILR4
Interrupt level setting register 4
W
1 1 1 1 1 1 1 1
7FH
Reserved area
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