參數(shù)資料
型號(hào)： MB89F051PMC
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP64
封裝： 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 12/40頁(yè)
文件大?。?/td> 931K
代理商： MB89F051PMC
MB89051 Series
2
DS07-12551-3E
F2MC-8L CPU core
Instruction set that is optimum to the controllers
-Multiplication and division instructions
-16-bit arithmetic operations
-branch instructions by bit testing
-bit manipulation instructions, etc.
PLL clock control
The internal PLL clock circuit allows the use of low-speed clocks which are advantageous to noise character-
istics.
(6 MHz externally-supplied clock
→12 MHz internal system clock)
Various timers
8-bit PWM timer (can be used as either 8-bit PWM timer 2 channels or PPG timer 1 channel)
Internal 21-bit timebase timer
Internal USB transceiver circuit (Compatible with full and low speeds)
USB hub
USB function Compliant to USB Protocol Revision 1.0
Five downstream port channels (One of these channels is dedicated to a function.)
Automatically responds to all USB protocols by hardware.
Descriptor configuration is provided as ROM data for automatic responding by hardware (Vender ID and product
ID) .
String data is not supported.
Allows switching between BUS power supply and own power supply mode.
Power supply to the USB down port is controlled port by port.
USB function
USB function Compliant to USB Protocol Revision 1.0
Support for full speed when using hub
Support for both low and full speeds when using function
Allows four endpoints to be specified at maximum.
Types of transfer supported: control/interrupt/bulk/isochronous
Built-in DMAC (Maps the buffer for each endpoint on to the internal RAM to directly access the memory for
function’s send and receive data.)
UART/SIO, SIO Serial Interface
Built-in UART/SIO function (selectable by switching)
× 1 channel
Built-in SIO (3.3 V)
× 2 channels
I2C interface
Supports Philips I2C bus standards
Uses a two-wire data transfer protocol
Master/slave send/receive
External interrupt
External interrupt (level detection
× 7 channels)
Seven inputs are independent of one another and can also be used for resetting from low-power consumption
mode (the L-level detection feature available) .
Clock output functions
Able for 12 MHz* and 6 MHz* clocks to output. (dedicated pins, 3 V)
Low power consumption (standby mode supported)
Stop mode (There is almost no current consumption since oscillation stops.)
Sleep mode (This mode stops the running CPU.)
(Continued)
相關(guān)PDF資料
PDF描述
MB89P133A-201P-SH 8-BIT, OTPROM, 4.2 MHz, MICROCONTROLLER, PDIP48
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