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參數(shù)資料
| 型號： | MB86612 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 98.304M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 24/35頁 |
| 文件大?。?/td> | 552K |
| 代理商： | MB86612 |
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MB86612
30
Rcv Termination
Parameter
Symbol
ICLK Rising ILWRE Rising Time
ILWRE Rising IV Rising Time
Last Data Output Disable Time
ILWRE Negate Time *1
ns
Unit
-
1tICLK+10
-
2tICLK-10
-
Value
Min.
Max.
Typ.
A
B
C
D
Condition
-
40
-
20
-
B
A
ID7-ID
0
IDIR
ILWRE
IERR
187
C
D
TS
ICLK
Hi-Z
IV
186
188
*1 : The MB86612 has two different types of mode for the ILWRE negation: 1) Negate the ILWRE every receipt of one source packet.
2) Keep asserting the ILWRE until data can be received into the isochronous FIFO. The above shown timing chart is for 1). When the FIFO
contains 1 packet (or more), the ILWRE is asserted again. In case of 2) however, when it is not possible to read from the FIFO,
ILWRE signal is negated as shown in the above timing chart and asserted again at which the FIFO can be read out.
*2 : TS signal (only for MPEG mode) and IERR signal are negated at the same time as ILWRE negation.
*3 : The receive data size for a packet is, a) 188bytes/packet in MPEG mode and b) 240, 480, or 960 bytes/packet in DVC mode.
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86612PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
| MB86612PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Bus Controller (for MPEG, DVC) |
| MB86613 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Open HCI Controller |
| MB86613PBT | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Open HCI Controller |
| MB86613PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:IEEE 1394 Open HCI Controller |
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