參數(shù)資料
型號(hào): MB86612
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 98.304M bps, SERIAL COMM CONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 20/35頁
文件大小: 552K
代理商: MB86612
MB86612
27
Xmit Termination
Parameter
Symbol
ICLK Rising ILWRE Rising Time
ILWRE Rising IV Rising Time
ILWRE Negate Time (*1)
ns
Unit
-
1tICLK+10
2tICLK-10
-
Value
Min.
Max.
Typ.
A
B
C
Condition
-
40
-
C
A
ID7-ID
0
IDIR
ILWRE
IV
1
B
ICLK
188
187
186
*1 : The MB86612 has two different types of mode for the ILWRE negation: 1) Negate the ILWRE every transmission of one source packet.
2) Keep asserting the ILWRE until data can be written into the isochronous FIFO. The above shown timing chart is for 1). When the FIFO
has space for storing 1 packet (or more), the ILWRE is asserted again. In case of 2) however, when it is not possible to write to the FIFO,
ILWRE signal is negated as shown in the above timing chart and asserted again at which the FIFO can be written.
*2 : The transmit data size for a packet is, a) 188bytes/packet in MPEG mode and b) 240, 480, or 960 bytes/packet in DVC mode.
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